Phase Shift Full Bridge SMPS is massively over-hyped?

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I for one, look forward to hearing of your progress with your high power converter for EV charging, at least the load is non-dynamic.
 

Progress?….this company has being trying for some time to find a SMPS engineer with multiple years of experience of designing 5kW plus SMPS’s. They have not found one. They are fearful of immediately going to a consultancy as they fear being ripped off. The boss’s have asked me (my experience only goes up to 500W SMPS) to design and build a 7kW prototype. They have requested this because they understandably want to know what are the general process’s involved in this activity. They also wish to learn more about SMPS in general by going through this design process.
..They wish to know this..
1…Because they want to be more knowledgeable so that they can better handle consultancies in this work, when they finally approach one.
2….Because when they eventually interview an Engineer who does have multiple years of mutli-Kw experience, they want to be able to assess, to an extent, if he/she is a ‘fraud’ or not.

The mass general staffing of this company, and its sister company, are not from an electronics background, and they are horrified that someone like myself , with experience up to only 500W, has been let loose on a 7Kw prototype, -they have no way of assessing whether or not I know anything at all about SMPS, and because they fear for their jobs if the company does not find a multi-Kw experienced SMPS design engineer soon, they want me gone, big time.
 
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Well that's a tough spot for you to be in, but the management wouldn't be helping themselves by firing you if you're the closest thing they have to what they want. If they want to do designs in-house, they either have to hire pre-existing talent or be willing to groom their own talent. If you want to be that talent, then you should start getting your hands dirty with actual prototypes ASAP and look beyond the simulations. Especially when you're at the point of dismissing industry standard design trends based on those simulations.
 

Thanks, but I don't think it’s I who has it tough, anyway, Hard switching converters at powers of a couple of kilowatts have had it tough in these posts, though all respect to the great posters who have donated their knowledge here on the subject. Its just that we have a 3kw charger, (85-265vac input, 300-400vdc output) made by a highly reputable company, and it comprises a 3kw interleaved boost pfc (fsw=45khz each), and a 3kw half bridge LLC (fsw = 100khz).

Now with all the bad news we’ve heard about hard switchers being so bad with EMI that one needs to severely slow up their switching transient, and then suffer the high dissipation, -this just seems a little “stretched”…….

…for example, the 3kw interleaved boost pfc in the aforementioned 3kw battery charger has literally half the heatsink size as the 3kw LLC. We cant say that’s because its an “interleaved booster”, because that just means that the individual boost fets share the conduction….which is exactly what the two half bridge LLC fets are doing.

So why then, if hard switchers are so dreadful with EMI that they need such slow switching transients that they dissipate like volcano’s, why is the 3KW interleaved boost pfc sitting on a heatsink literally half the size as the 3kw LLC converter? (this charger is made by one of the finest co’s out there)
Touching the heatsinks, the (bigger) LLC heatsinks are hotter than the boost pfc's heatsink.

I mean, its half the size! Half. I think we need to get hard switchers into a more accurate perspective. In these posts, we saw that the real crowning point for the PSFB was that you could put relatively big caps across the fets and reduce your turn off losses…………however, the infineon app note of a few posts back brings forward the drawback of having caps across the fets in PSFB's, and we see how caps across the fets in PSFB's increases very-light-load losses.
This isn’t good for vehicle to grid chargers which will spend most of their life in very light load….i mean especially the ones that are putting power back into the grid from the batteries….might a full bridge come in useful here?
 

First of all, EMI and dissipation are two completely different things. Different manifestations of the same phenomenon, but there's no reason to assume they will always correlate.

From an EMI perspective having a boost followed by an LLC makes sense, since the EMI from a boost manifests mostly on its output, and EMI on the intermediate bus isn't so problematic. Likewise, for the LLC the switching is (too my knowledge) harder on its input side, which is again on the intermediate bus.

As for the issue of differing heatsink sizes, we can only guess. It doesn't even mean that the losses in the LLC are substantially higher. Seeing a picture would probably help.
 

Getting off topic, but...


The mass general staffing of this company, and its sister company, are not from an electronics background, and they are horrified that someone like myself , with experience up to only 500W, has been let loose on a 7Kw prototype
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fear for their jobs
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In view of reasons 1 & 2 above, it shouldn't be so drastic as all that. Is there someone making it sound so drastic?

Tips:

* If anyone suggests you're not up to the task, emphasize your >>demonstrated<< past success.

* Avoid telling details about your design to any and every individual. It is possible that someone wants your job, and will look for some disadvantage in your design, and find it (because every design has some kind of tradeoff), and mouth off to others about it.

* Since you have already made a 500W unit, can you quickly put together, say a 2kW unit, to show a few important (or influential) people that 7kW is do-able? It will be a major challenge technically, of course, but elements of human nature are involved here and they are just as challenging.
 

First of all, EMI and dissipation are two completely different things. Different manifestations of the same phenomenon, but there's no reason to assume they will always correlate.
Click to expand...
I agree that they won't 'always' correlate, however, as you know, the considered way to make hard switchers less EMI unfriendly, is to slow up their switching transient, which inevitably results in more switching losses and more dissipation (unless regenerative snubbers are used but that's another story, and they haven't been used in the unit that I spoke of before).

With the interleaved boost sitting on half the heatsink size as the LLC, (and its heatsink being cooler than the LLC one), one wonders just how EMI unfriendly hard switchers really are. Is there some degree of exaggeration going on here.

Considering the above unit, the two LLC fets sit on a heatsink which is 110mm by 50mm by 5mm. The 4 LLC diodes sit on another heatsink the same size as the FETs.
All the interleaved boost PFC power semiconductor components (2 fets and 2 diodes) sit on one heatsink, the same size as just mentioned. And the boost PFC's heatsink is no hotter to touch than the LLC ones. The hottest heatsink is the one with the LLC diodes on it.

As discussed, I appreciate that's its a 3kw "interleaved" boost converter PFC, with two fets, sharing the conduction, however, that's no different to the 3kw LLC stage, where its two fets share the conduction.
Where is all this suggested dissipation from slowing up the switching transients of hard switchers in order to staunch their unfathomably dreadful EMI unfriendliness.?

- - - Updated - - -

One of the main themes of these posts, has been the addition of capacitance across drain-source of the fets in the PSFB. However, page 9 of the following infineon app note states that in fact, “decreasing” the capacitance across the fets is what is required in a PSFB…Quoting infineon…
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“For that reason, it is logical to reduce the capacitive energy in the circuit rather than increasing the inductive energy, this implies the necessity of low MOSFET’s output capacitcance for this converter and for other ZVS topologies in general”
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..This is from page 9 of ..
“Design of phase shifted full bridge converter with current doubler rectifier”
Design Note DN 2013-01
**broken link removed**
 
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I believe Easy Peasy's suggestion of additional capacitance was for the purpose of reducing turnoff losses in the FETs. That document doesn't consider turnoff losses, and instead addresses dead time and frequency. They're not contradictory, they just address different aspects of the converter operation.
 
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thanks, and that harps back to what this post was originally all about, ie, that the PSFB doesn't "always" have majorly significant advantages over the plain full bridge.
The situation of adding capacitance across the DS of the fets of a PSFB , and thereby reducing the switch OFF loss, and switch OFF EMI, is pretty much the main “coup de gras” of a PSFB converter, but as infineon point out, you most certainly wouldn’t always want to do it with a PSFB ( for multiple reasons discussed elsewhere in this post). As we’ve seen, the "plain" full bridge with full bridge diode rectifier in secondary, has pretty minimal switch ON losses at full load anyway. Also, has pretty minimal reverse recovery of the secondary diodes.

I think Easy Peasy nailed it brilliantly when proffering up the situation of adding DS caps to a PSFB. I had overlooked this advantage, and looking at huge amounts of web literature shows that many others have too. Of course, its not every PSFB that can benefit from having such DS caps added.
 
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You simply can't have the same sort of fast hard switching that a booster does on a main down converter, all due to the propagation of RFI/EMC issues that result from 6 devices and a transformer all radiating interference into control and else-where, only people that have built high power converters have a real feel for this, the harder you switch the bigger the VHF noise (& higher freqs) the better all the interconnects (xfrmr and wiring) radiate it, the harder it is for your control to work and to pass EMC...
 

Okay, now I'm getting skeptical. What does the number of devices have to do with RFI and EMI?

Watt for watt, a simple hard switched DC-DC stage like a buck or boost is going to generate the highest dv/dt and di/dt due to the direct connection of the diodes and FETs. How those transients propagate to become EMI and RFI depends mostly on layout. And while the transformer certainly is a potential emission hotspot, isn't it also standard to put rfi screens between layers at high power levels?
 

In a booster the dv/dt is in one spot, not connected to a raft of other things, if you create high dv/dt on an H bridge, and connect it to a xfmr, and then to diodes and DC wiring, the diodes themselves contributing noise as you force commutate them at high di/dt, you create a passel of noise which gets into everything, if you've never built high power converters at high freq, you'll have trouble understanding the effects....
 

The full bridge, with full bridge secondary rectifier, has natural leakage inductance in the transformer, that does a pretty good job of slowing up all that high dv/dt, and high di/dt anyway. The attached LTspice simulation, showing a full bridge with and without the leakage inductance in its transformer, shows what a marvellous effect the leakage inductance has in a "plain" full bridge converter.

Though, I would confess, that in that proportion of PSFB's that can have say 1nF caps paralleled with its FETs, then there is a considerable reduction in turn-OFF EMI compared to a full bridge. In that proportion of PSFB's that won't have the extra caps across the FETs, well, we look at them and think, hmm, is this worth doing with a PSFB?
 

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so, when you have large currents in the o/p diodes, and correspondingly high reverse currents at turn off (even if only capacitive in the device) , and more so when hot, when the diode finally turns off and supports voltage high dv/dt is the result and high ringing di/dt, large snubbing to cure this results in extra current spikes in the mosfets at turn on, all of this is a lot less in a properly designed PSFB...
 

large snubbing to cure this results in extra current spikes in the mosfets at turn on,
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if you run the simulation in post#1, you can see that the transformer leakage inductance (of a plain full bridge SMPS) stops the current from the secondary snubbers from appearing in the primary fets.

The full bridge simulation of post #36 shows that increasing the leakage inductance in a plain full bridge smps (within reason) does not increase the secondary diode snubber losses in a plain full bridge.....so we can increase leakage in the full bridge (within reason) and get further benefit.

I think we can hand the PSFB (with or without pllel caps) the advantage that at turn on, it will avoid the sudden discharge of the DS capacitance. However, the simulations show us very little overlap dissipation in the fets of a plain full bridge at turn on (due to its leakage inductance).

Also, now that (thanks to Easy Peasy's excellent knowledge here), we realise there are two types of PSFB...those with , and those without parallel caps across the fets.......the ones without the pllel caps across the fets are suffering high switching loss and EMI at turn-OFF, just like in a plain full bridge. (that's a plain full bridge with leakage L in the transformer)
 
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if you run the simulation in post#1, you can see that the transformer leakage inductance (of a plain full bridge SMPS) stops the current from the secondary snubbers from appearing in the primary fets.
Click to expand...

What do you see when you run the same circuit in real life...?
 

I think few would disagree with the simulator here, at the end of the day, inductance is going to slow up sudden current change.
 

Here, (quote immediately below) it is said that a PSFB does not have very heavy output diode snubber losses because of the “diodes to the rails”
Which “diodes to the rails” are you speaking of may I ask?
Are you speaking of the diodes that are across the primary side mosfets?
If so, then these diodes also exist in a plain full bridge converter too, and can therefore do the same job of reducing snubber losses in a plain full bridge converter……

…from post #20


In this next quote, you appear to be saying that increasing the leakage inductance in a plain full bridge transformer causes more losses in the output diode snubbers. However, elsewhere in this discussion (post #36) it has clearly been shown that increasing the leakage inductance (within reason) in a full bridge transformer does not increase the losses in a plain full bridge’s output diode snubbers…

“Un-usually high leakage is not that helpful as it requires extra snubbing when the diodes turn off.”
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..from post #22

Another point about the PSFB, is that turn-off switching losses in a PSFB_without_extra_caps_across_the_fets, are every bit as bad as in a plain full bridge SMPS.
 

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