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LCRZ-Meter project(DDS signal source), large project with many questions/subjects.

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I believe Q and Qbar outputs are 90 phase shifted; I think you do not need two!!
 

In a LCR meter, the quadrature reference signals are usually generated along with the source signal as you can see in the HP/Agilent block diagrams. Need for a separate phase shifter suggests an unsuitable instrument design. But if you actually need to derive it from the source signal you should consider a PLL generator.
 
Hi,

I agree with FvM.
That's what I wanted to say many posts before.

If I remember right, then there are DDS chips that are able to generate (besides the sine) the square wave logic signal.

I doubt a PLL is stable for the whole frequency range. At least I have no experience with that huge frequency range and PLL.

Klaus
 

Well I have based my design on the AD9954 400MSPS 14-bit output DAC Complete DDS and as such I have no other approach for this, but I have noticed that the most usual solutions generate the excitation signal in ways which enables accompanying signals to be generated separately.

I was really hoping no one would write the word PLL, I have looked into this a little and my head aces from the idea of having to get into PLL's and learn all that stuff as well. But that fear have been accompanied by a insight that even though I really don't want to have to mess with that I will probably have to do so in the end.

But before I go down that road let me ask you this, while spawning ideas for a phase-shifter I have been pondering and wondering about what delays I can expect by doing things like squaring the sine-wave with a comparator, at times I have been thinking that accomplishing this phase-shift with gates or other circuit blocks might not be possible at all.
Klaus has been very adamant about the importance of the reference signal and the situation where any delays or other impacts on this signal really are unacceptable due to the huge impact on the performance this can have.

Unless anyone here have a suggestion I can't think of any other way around this than(besides PLL which I am assuming can solve this situation) to use a second or 2 more Complete DDS IC's. AD99xx Complete DDS IC's do have options for synchronizing multiple devices but as I understand these IC's they do not have the ability to create square-waves, not without using the internal comparator.

I just thought about this solution:

What if I would accept adding a second AD9954(or some equivalent, the extra cost of another AD9954 isn't something I take lightly), if I did that then I could do it like this.
The first AD9954 is creating the excitation sine-wave as well as using it's internal comparator to create the synchronous reference signal(synchronous to the excitation sine-wave), at the same time I am syncing a the second AD9954 to the first but this DDS is outputting a sine-wave which only goes to it's internal comparator to square it. Then I could use the DDS's internal control registers to create a 90deg phase shift relative to the 1st AD9954's signals.

I feel quite confident that this would work but it is possible I have over looked something, I know that this might be a somewhat weird or inefficient solution but the extra cost would be worth it. I have the software to develop as well and I don't feel up for tackling another complicated subject(PLL), I will look into the AD9954 datasheet to make sure this would work. ...looking...looking...looking...

Yes this should most certainly work, the AD9954's internal comparator have a propagation delay of 3nS so I can't see how my latest idea wouldn't work great, although at a high cost.
And Although I get confused with the terminology of the AD9954(DDS in general) datasheet I am sure that I have control over the phase, I relate the word phase to the phase-shift between 2 signals but this DDS has a phase accumulator which isn't as I understand it related to the phase of the signal at all. There are however a Phase Offset Word that can adjust the phase.

I wouldn't ordinarily accept this solution(if we went back 1 month in time I would never have been even considering this) but I have my hands full as it is and in this case I think I would do well in paying for another AD9954 if that would solve my reference signal trouble.
I nothing else it would be kinder to my mental state...
 

I doubt a PLL is stable for the whole frequency range. At least I have no experience with that huge frequency range and PLL.
A PLL with digital PFD (e.g. 4046 phase comparator 2) can potentially work over a large frequency range if no fast frequency variations are intended. But switching the loop filter per octave or at least decade would be preferred.
 

I will take a look to see if I can find a cheaper DDS to synchronize to the AD9954.

Hmm... It seems I can't even keep track of what I am writing, I thought I wrote in my last post about FPGA.
Because I have been drawn to that idea more and more but after reviewing what FPGAs are I have concluded that it is not something for me, I still struggle with some fairly basic C stuff with microcontrollers.

But all complete designs for a LIA I have seen online besides low-speed analog stuff have been of the variety that is completely or next to completely digital.
 

IBut all complete designs for a LIA I have seen online besides low-speed analog stuff have been of the variety that is completely or next to completely digital.

But if you read a bit more carefully, you will notice that the LIA, both in concept and operation is an analog beast.

The square waves appears in the story because the sine wave heads have been chopped off; what we need are the zero crossing points in the graph. The vertical lines are not vertical but it does not matter in the function or operation. We only care whether the sign is positive (up) or negative (down).
 

Hi,

The AD9954 has a sync_out signal. Maybe it is possible to use this signal to generate (or synchronize) the comparator signals (use clocked comparators?).

***
LIA a beast?
(That´s not my experience. I was very excited form the simplicity and the enourmous quality of the output signals: Stable capacitance resolution in the low femto-Farads.
But i had other signal-generating circumstances than David. I generated a fixed frequency 1Mhz sine signal, with fixed amplitude and very low distortion from digital outputs of an FPGA, and from the same FPGA i generated the quadrature signals. I expect the RMS jitter in the low picoSeconds and the 90° phase deviation less than 100ps. )
****

The LIA has three inputs:
* one (the!) analog signal
* two (digital) logic quadrature signals

and two outputs.. after filtering:
* analog real part (of analog input signal), DC, not high frequency
* analog imaginary part (of analog input signal), DC, not high frequency

*****
The benefit of the LIA is that (compared to a comparator) it does not only determine the time of zerocross (wich is sensible to voltage noise, voltage riserate and other timing jitter) but it takes the whole signal into account. Therefore it is less sensible to noise.
Within the LIA there is no "head of sine been chopped off". If that happens then the input of the LIA is clipped and thus the output of the LIA simply is wrong.

*****
I don´t say the LIA is an easy task.. one must take care of signal integrity, phase angles and amplitudes. But it is not more difficult than with a high speed ADC solution.
Maybe I´m too focussed on the signal precision. Maybe generating the quadrature signal with the help of comparators is good enough for the OP. I don´t know.

Klaus
 

The AD9954 has a sync_out signal. Maybe it is possible to use this signal to generate (or synchronize) the comparator signals (use clocked comparators?).
Klaus

Well the problem with that is that the AD9954's SYNC_OUT signal is fDDS_system_clock/4
But wait, that doesn't have to be a problem at all, since the DDS system clock will be somewhere below or exactly at 400MHz.
Clocked comparators... Never even heard of such a thing but it shall be interesting to look into, the name makes it sound like something quite suitable.


I don´t say the LIA is an easy task.. one must take care of signal integrity, phase angles and amplitudes. But it is not more difficult than with a high speed ADC solution.
Maybe I´m too focussed on the signal precision. Maybe generating the quadrature signal with the help of comparators is good enough for the OP. I don´t know.
Klaus

Nether do I, but it is easy to imagine that errors/delays in the reference signal(s) could set off the hole system.
And while I spend so much time and am allowing my self to choose the best parts in order to try to get high performance it wouldn't feel right to be sloppy with the reference signals, also this forces me to look closer at a few things which is good for me too look closer on.

I have been thinking that a PLL driven by the AD9954 comparator(sine-to-square)... I am at this point in time not sure about what I where thinking that the PLL could be driven from, the problem I am having with learning about PLL's is that it is very hard for me to extract the relevant information, the only thing I have found so far is that something called a DLL is involved in creating a quadrature signal...

I know that there are PLL IC's so maybe that is a way to go, but first I shall look into clocked comparators.

Regards
 

How about using a second tiny µC to create the square-waves?

The problem seems to be that there are no analog/discrete way to create a phase shift over a frequency range, for a single frequency sure but in order to phase shift a frequency range I would need a dynamic circuit that extrapolates the signals period which is changing with frequency.

Also I have found a cool high-speed comparator from LT that has a dual supply input stage and a single supply output stage, so using that all I need to do is to ground one of the inputs and feed the sine-wave to the other input and out comes a square-wave.

I think it has to be something like this.
 

Hello.

I have gotten a circuit suggestion from a person whom says that it has worked great for him many times, so I am awaiting the delivery of 2 XOR single gates and 1 dual d-type flip-flop(I will get more of them but that is what is needed for the circuit).

In the mean time I thought I would ask if someone here could help me understand how to simulate the data streams coming from the complete and functioning circuit in Matlab?

I don't need any help with the Matlab programming but I don't really know how to convert two sine-waves with a phase difference into values that could have come from the ADCs reading the two LIAs.

Creating a sine-wave is easy enough, adding a phase difference to it is also easy enough, maybe I should also create the two square-waves and then work out some way of performing the multiplication of the PSDs in software...

Or could it be possible to simple transform the sine-waves into an representative DC signal...

Any suggestions on this would help me out a lot because I want to start experimenting with matlab and the complex numbers calculations.

Regards
 

Using D-type flip flops you can produce square waves at 180 and 90 phase differences with little effort.They simply act as frequency dividers.
 

Hi,

In the mean time I thought I would ask if someone here could help me understand how to simulate the data streams coming from the complete and functioning circuit in Matlab?
Example: a sine with 3.5V amplitude and +30° phase shift.

Imagine a coordinate system.
Draw a circle with radius 3.5cm around zero (0/0).
(0 degree phase shift is a line from (0/0) to the right side.)
Now draw a line from (0/0) but 30° shifted ccw. (First quadrant, x is positive, y is positive)
The line crosses the previously drawn circle.
Now calculate (measure) x and y of the crossing point.
X = 3.5 × cos(35°)
Y = 3.5 × sin(35°)
These are the two DC values output from the filtered LIA.

Using D-type flip flops you can produce square waves at 180 and 90 phase differences with little effort.They simply act as frequency dividers.
It's not the problem to generate two 90° shifted digital signals.
But they need to have the EXACT same frequency as the sine, and they need to have a VERY CONSTANT phase relation to the sine.

Klaus

Klaus
 

Example: a sine with 3.5V amplitude and +30° phase shift.

Imagine a coordinate system.
Draw a circle with radius 3.5cm around zero (0/0).
(0 degree phase shift is a line from (0/0) to the right side.)
Now draw a line from (0/0) but 30° shifted ccw. (First quadrant, x is positive, y is positive)
The line crosses the previously drawn circle.
Now calculate (measure) x and y of the crossing point.
X = 3.5 × cos(35°)
Y = 3.5 × sin(35°)
These are the two DC values output from the filtered LIA.
Klaus

Thanks, I'll sit down tonight and do that and think a good while about it, I just realized that while reading up on LIAs I have in several documents read equations describing some part of the process, it kind of looks like:

Vsignal = Vsig*sin(ωsig*t+φsig)
Vreference = Vref*sin(ωref*t+φref)

VPSD = Vsignal*Vreference
VPSD = ((Vsig*Vref)/2)*{cos([ωsigref]*t+φsigref) -cos([[ωsigref]*t+φsigref)}
...
Sorry lost my train of thought but I am leaving it here anyway so I can copy and paste later, perhaps...
In any case the equations describe the PSD process, which I guess is obvious to anyone whom knows about this stuff.

It's not the problem to generate two 90° shifted digital signals.
But they need to have the EXACT same frequency as the sine, and they need to have a VERY CONSTANT phase relation to the sine.
Klaus

I had really hoped that buying ICs with the lowest propagation delay's on market could work and I will try it out but I don't actually expect it to work...

I will look for a multi channel DDS, I know of a Analog Devices quad channel 10bit DDS but I am really fond of my AD9954 and it's 14-bit output DAC, I have noticed that that is the way I am, I get an idea and I can't be satisfied without fulfilling it.
might be Asperger related or I am simply pron to obsessions or something.

But I was thinking, what if I was driving both the DDS PLL and the XMEGA µC from one and the same crystal.
Would that allow me to synchronize square-waves generated by the µC to the DDS?

The DDS will if I don't make any change use it's PLL to derive a 400MHz clock or close to 400MHz, and it has a sync output that is outputting the system clock/4 so 100MHz.
I don't know enough to be able to tell if the following could work because the µC will have to run at a maximum of 42MHz, since that is the USB speed, I have talked to people whom have driven a XMEGA µC with as high as a 75MHz clock.
But say that I was using the XMEGAs internal 32MHz oscillator, do the DDS sync signal need to be below that in order for the µC to be able to sync to it, or does it even have to be some particular relationship between the two frequencies?
 

I came to consider the LIA concept as a dead-end because of the difficulties I had with the reference signals, but before I abandoned that to go back to the timed high speed ADC concept I asked on the ADI forum, they call it something else that I can't remember.

The folks there introduced me to AD9854, I have just begun going through the datasheet but even though it contains a dual DDS outputs it doesn't show up on ADI's website when looking for DDS ICs.
Anyway it contains two 12-bit DDS output DACs and a 14-bit phase-shift control register but I am concerned about one thing.

My signal chain for the excitation signal contains something like 3 or 4 opamps and some switched passive components to adjust the gain and current limiting resistor.
I have to account for that in the reference signal channel do I not?

Can it be sufficient to measure the excitation signal channel and adjust the reference channel by it's 14-bit phase-shift control register or do I have to build a minimalist signal chain for the reference channel that contains the same opamps as the excitation channel?
 

Example: a sine with 3.5V amplitude and +30° phase shift.
... ...
X = 3.5 × cos(35°)
Y = 3.5 × sin(35°)
These are the two DC values output from the filtered LIA.

Why 35; I believe you mean 30, right?
 

Okey let's try it like this.
How would I go about finding out what kinds of delays I will face through all the opamps, that can't be harder than to look at the datasheets but what I don't know is if these delays is a constant delay over gain/frequency or if the propagation delay will vary as the frequency varies and as the gain is adjusted.
Does anyone know anything about this?

I don't think that the design would look good and as have been thought through if I where to us a few "dummy" opamps in the reference signal path that don't do anything other than to imitate the excitation signals signal chain.
But perhaps that would be a perfectly valid application for opamps.
 

Have you settled on a reliable method to measure small Henry values? These will be difficult. I imagine only simple networks can get measurements of these. The fewer components involved, the more reliable the readings, or the closer the resolution (I think).

Small Henry values have tiny time constants. Current quickly rising and falling. Or, if you measure response to sinewaves, then they need to be very high frequencies.

If you can lengthen the inductive time constant, or get it to respond to lower frequencies, then it will enhance your meter's usefulness. I guess this means I'm puzzled that you plan to put op amps in the measurement path.

This doesn't mean I know an easy method to measure very small inductors.
 

Hi,

with my application, I first tried to amplify the "current signal" before the LIA. There is high frequency, and all the phase shift causes error in phase measurement.

I did some test and found out that it causes too much errors. For sure some can be compensated by subtracting the delay or the phase angle...
But there were errors remaining, where I didn´t find the cause. But on the other side i did not spend much time....
I decided to do without the amplifiers..and the results were extremely good.

***
What I want to say: For sure you can do with the amplifiers, but you need very careful design. Otherwise you will loose precision instead of gaining precision.

In any case I recommend to use very symmetric amplifier design for current and voltage paths.
Expect to test some different OPAMPs and some different circuits. Maybe do a test without the amplifiers just to compare the results.

Klaus
 

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