nicleo
Advanced Member level 2
Previous post and figure were updated. I assume the transistor used in your circuit is PNP, right?eminence said:How would you layout the schematic to achieve the desired result?
Pls refer to the figure below. I think there is a problem. No matter the output of NOR gate is '0' or '1', the transistor will still be triggerred or ON. When the output of NOR gate is '0', the voltage at point B1 will be 0V, and therefore Q1 should be ON. When the output of NOR gate is '1' (HIGH or 5V), the voltage at point B1 will be near to 0V because 100k resistor is much larger than the 4.7k resistor. As the result, Q1 should be ON. Pls correct if if I'm wrong.