help about SMPS compenstion network.

[VVV]

I will post tomorrow the RMS current calculation. I made a drawing, but I left the file and I don't want to spend the time to do it again. I am talking about the first cap, since it takes the high peak currents. You will see in my drawing tomorrow.

I looked at the layout. It is not exactly what I would have done, but if it works, leave it as it is. Basically, the ground on the input side should have been routed differently: the current sense resistor should go to the (-) of the input caps through a short tace. The ground of the UC3845 should also go to the same point, through a different path (star connection).
The (+) of the input caps seems fairly close to the transformer, the RCD clamp is also OK.
On the output side, the opto has one tace going between its pins. Usually the creepage is at its minimum there, so no traces are allowed between the pins of the opto. Plus, the traces going to the opto diode should run parallel for as long a distance as possible.
I do not see the large cap, nor the LC filter.

A 100nF ceramic cap is typical. Remember to measure output noise using a short ground connection on your probe, like I tried descrbing. I still have not found that appnote.
Common mode chokes on the output are used sometimes. They will reject common mode noise and are required if the load is sensitive to that and if the output ground is isolated from the chassis. LC filters on the output filter out normal mode noise, and they are almost always used in flybacks, because the large peak secondary currents create large voltage spikes. More on this tomorrow.

There are variations between devices, so a different threshold does not surprise me.

The fact that the cap blew up means that the control loop was opened temporarily, or somehow something in the loop got "stuck". I wonder it it has something to do with the frequency foldback. I never liked connecting anything to the error amp output, like they did. I anything goes wrong there and the chip cannot pull pin 1 low, the feedback loop is inoperational, "kaboom" goes the output cap....
Anyway, I do not know for sure that was the problem, but it's possible. Other than that, I do not think the loop is so slow as to allow the output voltage to increase to 40V long enough for you to actually measure that and actually destroy the cap. Caps have surge ratings that are higher than their rated working voltages. But they have to last for short periods of time and occurs infrequently (once a minute or so). Since the cap blew up, is was not just a transient due to a slow loop, it was an "open loop", I think, although I don't know what caused it.
On the other hand, you say that you can actually see the voltage dip to zero volts under some conditions. That could indicate an excessively slow loop, but I doubt it. Maybe you can do some transient tests and post some pictures, they may help.

I have no idea why the Ve is 1V in the appnote. The equation is very simple: Ve=1.4V+3*Rs*Ipk, where Rs is the sense resistor and Ipk is the MOSFET's peak current. Normally, the Rs*Ipk voltage is set to about 0.7V for full output current (you select Rs so as to get 0.7V across it when delivering max current). This "magic" value of 0.7V works well (large enough for noise rejection) and is below the 1V internal clamping voltage (the chip has a 1V Zener inside that clamps the voltage at about 1V; by selecting 0.7V, the P/S cannot deliver more than about 25~30% more "juice"). Now Ve=1.4+3*0.7=3.5V at full power. You probably remeber me quoting this voltage.
As for the minimum, it is obvious that is should be greater than 1.4V for you to get any duty-cycle out of the chip. So why 1V, I do't know (well, the 1.4V is not strictly 1.4V, since it comes from two diodes in series, so maybe it can be as low as 1V, but I have no idea if that has any connection to the value quoted in the appnote.)

 

[roofingboom]

ok so i found a mistake in my calculation sheet i made in excel that was calculating values for the loop compensation network. Now that i fixed it i am using an 1000uF output cap right after the diode. The loop compensation calculated values are C1 = 300pF R2=34.6K and C2 = 3.4uF. R2 and C2 are the elements in series for the feedback.
Are these values consistent with something you would calculate? I used low load as .1A high load as 3 A, Vout as 12V, Vinlowdc as 127 Vinhighdc 850, Npri =1 , Nsec = .125, Ve = 1 , Rsense = 9.57k, and Fsw min = 75KHz.
Let me know if you calculate a diff loop compensation.

I tested this new compensation and there is no noise whatsoever and minimal ripple. I do not have an LC filter on there and its clean as a whislte. Problem though, i think i am still facing a loop compensation problem. At higher input voltages, if i go from 0 load 0A to high load 2A the output spikes UP to about 30-45 volts. On the other hand the power supply can handle it if i start with a load of lets say 2-3A and keep increasing the input voltage up to max input voltage of 850 but problem is it cannot handle a quick switch from no load to high load. My question then is, Is the loop compensation network to blame for this? Should i have a dummy load in the circuit at all times like a 1k resistor on the output just so i am always at light load? I did see 1 or two designs where all the flyback outputs had a 1k on the output which i assume is a dummy light load to mantain stability. Since this power supply will see quick changes in output current like .25 A to 2.5 A i need this SMPS to be stable. How should i go about stabilizing this unit?

Added after 33 minutes:

I was looking more into the problem and trying to put a explaination to my problems. One thing i read about is biasing the TL431 correctly but putting a resistor from the output votlage 12V to the cathode of the TL431. Well that might be a good thing to do i just cannnot lead myself to think that biasing the TL431 is the problem. Please shed some light on this for me cause i think it is loop compensation and i am not sure how to obtain the correct loop compensation

 

[roofingboom]

Ok i took some pictures for you to analyze
Channel 1 is the output!
Channel 2 is voltage seen by the UC3845 at pin 7
I have two tech built proto boards. Everything is the same except for
Setup 1:
Onsemi uc3845
Rt = 27.4k
Ct = 220pF
output C = 1000uF
loop compensation
C1 = 300pF
R2 = 34.6k
C2 = 3.4uF

Setup 2:
Microsemi IPG uc3845
Rt = 9.24k
Ct = 1000pF
output C = 330uF
C1 = 1300pF
R2 = 4.7uF
C2 = 8k

For refrence Rt and Ct are the timing reisitor and capactor values and determined via manufactor data sheet. Output C is the capacitor after diode. I have no LC atm. C1 is the lone capactior in the feed back loop and R2 C2 are the series feedback loop. I now have some pictures to post of the output of both setups and various loads.

After uploading all these photos i realized it cost you points to look at them so next time i will put all pictures in a zip and upload to rapidshare. I apoligize for that.

 

[VVV]

I will look at the pictures tonight. I am not worried about the points issue.

As promised, here is the calculation of RMS currents. In SMPS, a very common waveform is the trapezoid. It turns into a triangle if the pedestal is missing, or into a rectagle of the top is flat.

So, starting from the trapezoid, the RMS current is, just by following the definition:

Irms=√[(D/3)*(Ipk^2+Iped^2+Ipk*Iped)]

where D is the duty-cycle, Ipk, Iped are the peak and pedestal values, as shown.

If the pedestal is missing (=0), the formula becomes:
Irms=√[(D/3)*(Ipk^2]=Ip*√(D/3)

For a rectangular waveform, the RMS current is then:

Irms=Ipk*√D

In the case of the diode, in a DCM flyback, the waveform is triangular, although "mirrored". You can still calculate the RMS current using the same formula as above. Note, however, that the D is the diode duty-cycle, that is, the ON time of the diode over the period. I think that is about 0.3T in your case (exclude the ringing).

This diode RMS current contains a DC component, equal to the output current. That does not pass through the output cap, so the cap current looks like in the third figure.
To calculate the cap RMS current, you can simply calculate the diode RMS current and then use this formula:

Irmscap=√(Irmsdiode^2-Iout^2)

That is the formula you should use. Some simplification is possible, since Iout is really Iout=(Ipk/2)*D, but I am not going into that now.

The same formulas are used to calculate the RMS currents in the transformer windings and in the MOSFET.
Note, however, that the peak currents are different. The diode peak current is the MOSFET peak current times the turns ratio, Np/Ns.
Clearly the diode current has a high peak. That is where the noise comes from:

Vripple=Ipkdiode*ESRcap

Therefore, the cap is selected such that the Vripple is reasonable, usually, 1% of the output voltage, about 120mVpp in your case. That is hard to meet in flybacks, that is why you need the LC filter.

 

[VVV]

I was really interested only in the transient pictures.
I see what you mean by the voltage going down to zero.
Judging by the large ripple you have at no load, I would think the output cap is too small. The P/S skips pulses and whenever there is a burst, the voltage jumps up, the error amp turns off the PWM completely and then the cap discharges until the error amp turns on the PWM again.
There is no real cure for the pulse-skipping, except adding a dummy-load. That may not always be possible, since it affects the efficiency.

My conclusion after seeing the pictures is that the output capacitor is too small and so it cannot "hold the fort" when there is a transient. I suspect the error amp is also too slow. The combination simply leads to this effect: a huge dip in output voltage during the transient.
Therefore I suggest you increase the output cap, first of all. Start from the value suggested in the previous post, based on ESR and ripple current. That should produce something in the 1000s of uF. Then we can deal with the error amp.

 

[roofingboom]

i have one unit that has 1000uF in the output filter cap position. The problem i am seeing here is that as i increase output capacitance i find that the power supply has more trouble with transients at high input voltages. Ill do some testing right now and post some pictures of what happens.
Do you have any comments on my calculated values for the loop compensator.

Ill change the first unit over to 1000uF also. NOTE: i have been noticing that when i increase my output cap that at higher input votlages, transisents cause the output voltage to soar up and outta spec even though if i start the power supply with this load it would handle it fine. The transients seem to be the only problem atm.

Added after 32 minutes:

i did some more testing and the voltage at pin 1 was very noisy on the microsemi ipg unit. The onsemi unit had a nice clean dc voltage at pin 1. Pin 1 should be a dc control votlage correct?
If so it should swing between 0 and 3.3 right?
The higher the voltage the more on time for the switch?
As i increased the input voltage of the onsemi the control votlage increased. I do not think that this is right. I would think that the control voltage at pin 1 should decrease if the input voltage increased. Correct me if i am wrong.
Thanks
PS i should have 5 real boards and populated by friday.

 

[VVV]

The voltage at pin 1 should actually have stayed almost constant with varying input voltage, since it only adjusts the peak MOSFET current, which is constant, if the power delivered to the load is constant, which I believe it was.
In the real world there will be slight variations, due to the changing losses with input voltage.
Pin 1 is pulled high by an internal current source toward the reference voltage, which is 5V. Therefore it can swing from 0 to 5V.

The higher the voltage on pin 1 means a longer ON-time for the MOSFET, but do not forget that the ON-time is really given by:

ton=Lp*(Ve-1.4)/(3*Rs*Vin)

where Lp is the primary inductance of the transformer, Ve is the voltage at pin 1, Rs is the sense resistor.
As you can see, ton varies with Vin without the intervention of Ve. As Vin increases, to decreases and vice-versa, without the need for Ve to change. This is the feedforward effect of the current-mode control. The on-time gets automatically corrected against line voltage changes, without the intervention of the loop. That is why the current mode topology has such good line transient response.

I have not looked at the calculations yet. I hope I will try that tonight, when I get home.

 

[VVV]

OK, I finally got around to do some calculations on the error amp.
Assuming a cap of 3300uF, with an ESR of about 30mΩ, and a maximum load of 3A, a minimum load of 30mA, the modulator gain should look like the one in the figure. I have not done the phase yet, since I cannot plot the error amp gain in Excel. But I will keep trying.

Anyway, the values for the error amp as I see them should be:
R44=130k
C20=390~470pF
C21=39~47pF

These are the values that I believe should achieve a crossover frequency of about 1kHz at full load (slightly lower with 470/47pF combination).
Try the transient response with these values. I hope nothing will blow up or oscillate.

Did you get similar plots for the PWM gain?

 

[roofingboom]

Well i have read 3 books/articles on control loops and i am really confused to say the least. Books i read are Control Loop Cookbook by lloyd dixon, swithing power supply design by pressman and switch mode power supply handbook by billings.

What do you mean by modular gain? In the App note for OnSemi one does not take into accout the cap esr? In the book by pressman it is suggest that you plot 4 (lines (min max input voltages with min max load).

Well basically i am really confused and was looking for some suggestions on how to clean up my thoughts.

The TL431 is acting as the error amp correct? So that would make R41 the input resistance and R44 the feedback ressistance. The gain then would be R44/R41 which would be 13.6 or 22.7dB.

I am really looking to learn this control loop stuff but am having trouble grasping it because of the various methods and theories. Any suggestions.

Maybe you could show me how you assemebled that plot. I am re reading lloyd dixon paper atm and will try your values in the SMPS later today. TYHANKS FOR YOU TIME AND HELP!

Added after 53 minutes:

Following dixons example
i am doing calculations tell me if you agree
K_FB = 4.8

are you using lyod dixon? i am curios as to how your calcyulatiing the modulator gain
K_MOD = d/Vc = 1/Vs
I am not sure what d, Vc, and Vs are because it does not note them in the book

K_PWR=Vo/Vcv

What is Vo, Vcv?

Ok from what i have read using lloyd dixons method you find all the gains except the K_EA. Then you tailor K_EA so that the total closed loop is stable?
Some of this control loop is starting to sink in. Let me know what you think!
Thanks

 

[VVV]

By modulator gain I mean the gain from the output of the error amplifier to the output voltage. Basically, you need to know this gain and later decide how you shape your error amp characteristic to stabilize the loop. Yes, Dixon's and Pressmann's method, and possibly anyone else's. I can't recall just know what Billings is saying, but I think he spends a great deal of time on the self-oscillating flyback.

Anyway, when I finish the spreadsheet, I will post it.
So the "modulator gain" as I call it is the gain of the PWM stage plus the output cap, load, ESR. Basically you ask yourself: if the voltage at pin 1 (error amp output) varies by a certain amount, how much does the output voltage change? That will give you the DC gain of the modulator. Next, you simply throw in the pole of the output cap/ load resistor combination and the ESR of the output cap to get those characteristics. Yes, you can plot 4 if you want, I just plotted 2, one for max voltage min load, one for min voltage max load.
Once you have the gain of the "fixed part" (things you cannot change, because they are established based on other criteria), then you design the error amp.

Basically, at the crossover frequency the characteristic should have a -20dB/decade. The crossover frequency should be greater than 1kHz, for godd traansient response. I know that 1kHz works fine, and the characteristic has a slope or -20dB/dec at that frequency, wo really all I needed to do was read the gain that is needed to "push" that characteristic up (at full load) to make it cross 0dB at 1kHz. It turned out I needed 22.6dB. That is where the gain comes from and that is how I calculated the 130k resistor.
Then, the error amp should have a flat response around your future crossover frequence, because you want to keep the slope as its, -20dB/ dec. So you need an error amp with one pole and one zero (a type 2 as Pressmann/ Dixon call it). To get that flat portion in the middle, you need the zero at a lower frequency than the pole. Now the pole and the zero should be symmetrical about the crossover frequency (geometrically symmetrical, as Venable would say, but I can't find that paper, try googling venable). The pole and the zero should be more than one decade apart. But I set them to exactly one decade apart, because I know this works. So the zero is at about 300Hz, the pole at about 3kHz.
That is how you now calculate the values of the caps.

I looked at the appnote again last night and it made very little sense, in the way the guy chose the zero frequency and in his "assumption" that the Ta caps will have the ESR zeroa at 15kHz. He should have provided at least one manufacturer for those caps, so we can check that. All Ta caps I found had an ESR zero of about 1.5~2kHz.

 

[roofingboom]

COrrect me if i am wrong but with the values you gave me i am calculating that the compensation values you gave me produce poles at 30kHz and 3kHz, not 3kHz and 300Hz. Did i make a mistake in math or did you? I bet i did but i just want to make sure
I calculated C=4080pF and other C = 408pF using a 130K resistor. Let me know if i am doing something wrong. Thanks
Thanks

 

[roofingboom]

when plotting the modlator gain what do you use for the DC GAIN?
I just did an example here and i need DC gain at high input low load and gain at low input high load. i then needed the esr zero and the output poles.
from that i was able to graph both lines.
Did you do something similar?

Also how do you get ESR information from a manufactur
i am looking to use caps from chemicon
**broken link removed**
the MVA series surface mount
They do not seem to have ESR data so what am i to do?

Thanks for your time.
and please let me see the excel sheet so i know how you arrived at thoose two capacitor values

 

[VVV]

Well, you are right, I got those cap values smaller by a factor of 10. Sorry about that.

The ESR is normally in the datasheet if the cap is for SMPS use. I have always used Nichicon, PL series. Now that the PL has been discontinued, it has been replaced by PW. **broken link removed**. Other suitable series are PS and PJ.

For UCC, try and see if there is an equivalent. I am almost certain there is one. You should also try to get the 105C parts, as reliability is usually an issue with caps operating at high ambients, as is the case with SMPS caps. It depends of course on your max operating temp, but for a regular 55~60C ambient (inside) and a normal design life of 5~7 years, you pretty much end up with 105C/ 3000 h parts.

Well, here is the spreadsheet, although it is not finished. I won't be able to finish it, as I will be away next week
Basically, I calculate the DC gain based on what the change in the output voltage would be vs. a change in the Ve voltage (at pin 1).
Starting from the load requirements, you calculate the equivalent load resistance:
Rl=Vo/Iomax=12V/3A=4Ω. The same for the min current, which normally is chosen 1/10 of the max current. I chose 1/100, resulting in 400Ω load at 30mA.
The output cap (right after the diode) I just picked to be 3900uF/10V and used the ESR that I know by heart by now, 30mΩ.
(That also gives you the Co, Rl location, simply as fop=1/(2*Π*Rl*Co) ).
Now the reasoning for the DC gain is like this: the Ve directly affects the peak transistor current, Ipk.
That affects the energy stored during the transistor on time: E=Lp*Ip^2/2.
That gets transferred to the load (with some losses, but for now we neglect them). Dividing that energy over one switching period is the power transferred to the load: P=E/Tsw, because you are using DCM, so the entire energy getw transferred.
But the output voltage (the voltage across a resistor) will be: Vo=√((E*Rl)/Tsw)
Since the energy is E=L*Ipk^2/2, it follows Vo=Ipk*√((L*Rl)/2Tsw)
But since Ipk is Ipk=(Ve-1.4)/3Rs, it follows that the variation in Ve produces a variation in Ipk: ΔIpk=ΔVe/3Rs

In the end, we are looking for ΔVo/ΔVe, the DC gain of the modulator, that is the variation in output voltage as we change the "input to the modulator" voltage, Ve.

ΔVo=ΔIpk*√((L*Rl)/2Tsw)=(ΔVe/3Rs)*√((L*Rl)/2Tsw)
And ΔVo/ΔVe=√((L*Rl)/2Tsw)/3Rs This is the DC gain I used and it depends on the swithing frequency, so I used each of the two extreme frequencies to calculate it.
If you find any errors, let me know.
While you are at it, check your cap's ripple current and see if you are within spec.

P.S. If the datasheet for a certain cap does not include ESR data, then look for a cap in the same can size from the same company, whose datasheet includes the ESR. Then take the ripple current rating of that new cap and calculate the cap's power dissipation based on the ESR and rippled current: P=ESR*Iripple^2.
Since the ripple current rating says nothing more than the permissible power for a certain can size, apply the equation to your cap to get the ESR. Not a highly recommended method but it usually gives you a pretty good idea of the ESR of a certain cap, which you can use to calculate the voltage ripple due to ESR.

 

[VVV]

Here is the updated spreadsheet. I still cannot plot the error amp properly, but it should be OK, if we ignore the limited (53dB) DC gain of the TL431. Just imagine the right side of the error amp gain flattens out to 53dB instead of going up.

 

[roofingboom]

ok i am done building 2 prototypes with the new manufactured boards. i am awaiting my California instruemnets power supply back so i can start testing on the new boards. meanwhile i have a learned a lot about loop stabilziation analysis.

I have a question though. You selected Fco to be 1kHz. Some of these books say you should select Fco to be 1/5 your switching frequency. So my question is what is the signifiace of Fco and which is better the better selection for Fco? Tradesoffs? Pros Cons?
Thanks agian for all your help i will post more when i actually get to test my unit

 

[roofingboom]

ok i did some testing and went from no load to 12 W load and the output voltage dips to 1v quicly before going back up to 12v
so what must one do to solve the regaultion of fast load switches?
do i need to increase Fco?
i am using a 3300uF output capactior and
130k resistor
390pF and 3900pF for loop comensation
i need some help on this as i still do not understand why it would dip
also where is the best spot to put Fco?
thanks

 

[VVV]

Basically, this is what you do, you ensure the crossover frequency is high enough, because that gives you the fast transient response. Sometimes increasing the output cap value helps, because the cap "holds the fort" until the loop is able to stabilize the output again.

A crossover frequency of about 1kHz should work well in most applications. The thing about the 1/5 the switching frequency dates back from the time of the bipolar power transistors, when the switching frequencies were in the 20KHz range. Because the SMPS is really a sampled-data system, the highest frequency you can work with must be less than 1/2 the switching frequency, but the crossover should be chosen even lower, say 1/4 to 1/5 fsw. That was a concern back then, because the error amplifier could easily make the crossover too high, given that the switching fequency was so low.

However, those times are gone and we are now switching in the hundreds of kHz and even MHz range. But that does not mean you should increase your crossover frequency to hundreds of kHz. Usually you keep it in the kHz or tens of kHz.

Again, the 1kHz should be fine for you. I don;t know why the voltage still dips. Iam going to repeat myself, but I am going to suggest you get rid temporarily of the frequency foldback and just have a resistor from pin 1 to pin 8 and run the PS at a certain input voltage, at fixed frequency and see what happens.

For the position of the pole, try searching the net on "the K factor". It was a paper by Venable. He basically said that the zero and the pole should be places "symmetrically" about the crossover frequency.

 

[roofingboom]

so i should pull out zener VR2 and remove r34, tie r46 to vref pin 8

then what should i do withpin 1? and should i unground pin 2?

what is the typical ESR of a gerneal capacitor ie one that is not for smps?

cause i am still waiting for my low esr 3300uF capactiors to come in and right now i am just using a regualt alum electrlytic capactior for the output. Do general capacitors have a lot higher of a ESR compared to low esr smps capactiors? Could this be moving my esr zero to a low frequency which in turns makes me cross Fco lower then 0dB instead of at 0dB?
thanks

 

[VVV]

You should remove the Zener and connect R46 to Vref (you should check the frequency after you do this, it may need to be adjusted).
Connect R34 between pin 1 and 8 (Vref). Leave pin 2 grounded.
This is a classical connection, it should work without problems.

By the way, usually the transient response is done between 10% and 100% load, although sometimes 0%-100% is also performed.

The ESR of a regular cap will be about 1.5-2 times higher. The higher ESR will indeed move the zero, but I don't think this is why you have a poor transient response.

Anyway, perhaps you can add more transient response pictures, with the fixed-frequency circuit. Please stretch out the time base so I can see the shape of the transient response.

What are you using to create the transient? I hope it's either an electronic load or just a MOSFET switching in and out a load resistor (this is actually the best).

 

[roofingboom]

1. whats the signiface of the value for r34?
do i have to recalculate r34 to work with 5 volts

2. I know i asked this before but i am going to ask again. The voltage at pin 1 should be a dc or ac voltage. I thought it was supposed to be a DC control voltage but it does not have a good waveform on my board.

3. So testing with power resistors going from 0 load to 3a load is not a good idea i should just do .3 to 3 amp transient response?

i am adjusting one board to reflect a fixed frequency circuit. ill get more pictures of the transient reponse and also let me know what pictures you would like to see!
thanks for all you help