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analog design solution of pulse creator question

yefj

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Hello There is a greate circuit shown below.Is goal is to convert power supply non sinchronios +12V -12V into sinchronios pulse.
It consists of many components which i am having problem to see how they work together.
Why the comparators have capcitor on one leg while the othe leg has resistor?
Why there is a diode after the BJT in the end?
Is there way ou could reccomend me to separate this circuit into parts so i could see the logic ?
LTSPICE file is attached.

Thanks.
1728849140482.png
1728849095904.png
 

Attachments

  • pulse_stabilizer.zip
    2 KB · Views: 12
Still no analog supply or I/O specs? If you convert DC OK to each input then each output is simply a logical sequence state for Off to ON to OFF and risetimes
and delays can be added if necessary and then the input voltage is constantly monitored to be OK at all times.

The solution is much simpler if you learn how to design than trying to teach you how to design.
But if you do not try you won't learn.

It can be old technology analog switches and Flip Flops or a CPLD and window comparators or anything modern with a simple BJT level shifter for the Gate driver but there are no complex analog dependencies, and you can 12V Schmitt logic gates for noise immunity or anything you understand such as Dana's cct.

https://www.ni.com/en/support/docum...emplate-documentation.html#section--631538078 is a starter page on finite state machines. Also look up Karnaugh Map and State Map, the solution is so simple but the foundational logic and language might seem complex.


Now you can get AI to design it for you with the right input (design specs) in a few seconds.

This is what you are lacking all along are complete design specs, not just the FET I/O specs but also all the power up sequence of supplies or fault conditions, thermal sensing, whatever. it must be robust but have tolerances.
 
Last edited:
Hello few questions:
1. if i use opamp with positive feedbak, isnt it going to create stability issues?
2.Why cant we use negative feedback?
3.can i use comperator to do shmidt trigger?
is it better.
 
UPDATE:
Hello FVM.I have implemented shmidt trigger using a comparator.
could you recommend how do i use this shmidt tigger to open my nmos and pmos at the same moment time?
Thanks.
1729185989948.png
 

Attachments

  • smidth_trigger.zip
    7.4 KB · Views: 1

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