pulse width stretching

[barry]

Isn't a Schmitt trigger AND gate a digital gate?

 

[iaf]

Isn't a Schmitt trigger AND gate a digital gate?

It is but it's not directly realizable so i wanted to know does it consist of

 

[barry]

Cant you use a spice model?

 

[iaf]

Cant you use a spice model?

no i need to simulate it in cadence as it's a part of another circuit. i have googled it but didn't find anything related

 

[barry]

Are you designing a chip? That would have helped if you mentioned it 50 posts ago.

 

[iaf]

Are you designing a chip? That would have helped if you mentioned it 50 posts ago.

yes, sorry i should have mentioned it in my original post but i have already mentioned it in my answers

 

[FvM]

You never mentioned IC design, just designing a circuit. I asked about the intended technology but the question wasn"t answered. It was obvious to me that the discussed implementation with 100 ms RC time constant is inappropriate for IC implementation. You better study the design of industry standard reset generators.

 

[iaf]

You never mentioned IC design, just designing a circuit. I asked about the intended technology but the question wasn"t answered. It was obvious to me that the discussed implementation with 100 ms RC time constant is inappropriate for IC implementation. You better study the design of industry standard reset generators.

That will still be possible by connecting the RC outside the chip

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if you could tell me what is a schmitt AND gate it would be great so that i can implement it. Is it just an AND gate with 2 schmitt triggers each connected to one input of the gate?

 

[andre_luis]

@iaf,

Your argueness in learning is admirable, but you should have already realized given elapsed almost half houndred replies that forums are not the appropriate place to learn the fundamentals of electronics; your questions are rather elementary, whose answers could quickly be found on the Web, and you seems too often somewhat disregard what people asked or answered. As stated in the header of Edaboard, it is a "forum for electronics" and it is expected to one have atleast a basic background, which is not being perceived so far. I'm particularly willing to close this endless thread and also inviting you to be back here after have a look at the infinity of available online video tutorials and blogs explaing things on details.

if you could tell me what is a schmitt AND gate it would be great

This was already answered many posts ago:

https://www.edaboard.com/showthread...tching/page2&p=1652806&viewfull=1#post1652806

 

[iaf]

I'm sorry if i have overlooked your post and generally for being not well informed about the topic. My apology to all of you guys.

 

[iaf]

ok one last question, is there a way to stretch it digitally for around 100ns only without having to use the RC?

 

[barry]

ok one last question, is there a way to stretch it digitally for around 100ns only without having to use the RC?

Use flip flop(s).

 

[iaf]

I tried generating a set signal from the rising edge of the pulse i got and feeding it as a set signal for the "counter" which is a d-flipflop with its D connected to the Qn. The problem right now is that the counter will keep counting so i will have half the clock frequency on the output after the pulse goes high as in the simulation. does anyone has a hint how to make it stop after this clock cycle?

 

[barry]

Something like this. You have to take the timing between the pulse and clock into consideration, but this is the general idea.

 

[iaf]

Something like this. You have to take the timing between the pulse and clock into consideration, but this is the general idea.View attachment 153923

oh that'S much more simple than i was thinking to do! thanks a lot