How to design Sigma Delta ADC?

[theking2020]

thnak you but do you have circuit to connect the adc to computer

 

[smilelangjun]

thanks field_catcher, I got a lot from the reply

 

[FvM]

When you don't need a steep filter characteristic up to near nyquist frequency, CIC filters are a rather simple and resource economical solution (no multipliers needed) and therefore have been used widely with commercial SD converters. They have basically (sinx/x)^n frequency characteristic. Sometimes they are combined with FIR correction filters.

 

[xwcwc1234]

Hi ,
I download a PhD thesis from internet , the details as below:
TITLE : "Hybrid Continuous-Discrete-Time Multi-Bit Delta-Sigma A/D Converters
with Auto-Ranging Algorithm"
Author : Sergio Pesenti , EPFL 2007

Abstract
In wireless portable applications, a large part of the signal processing is
performed in the digital domain. Digital circuits show many advantages.
The power consumption and fabrication costs are low even for high levels
of complexity. A well established and highly automated design flow
allows one to benefit from the constant progress in CMOS technologies.
Moreover, digital circuits offer robust and programmable signal processing
means and need no external components. Hence, the trend in consumer
electronics is to further reduce the part of analog signal processing
in the receiver chain of wireless transceivers. Consequently, analog-todigital
converters with higher resolutions and bandwidths are constantly
required. The ultimate goal is the direct digitization of radio frequency
signals, where the conversion would be performed immediately after the
front -end amplifier.
ΔΣ-modulation-based converters have proved to be the most suitable
to achieve the required performance. Switched-capacitor implementations
have been widely used over the last two decades. However, recent publications
and books have shown that continuous-time architectures can
achieve the same performance with lower power consumption. Most designs
found throughout the literature use a single- or few-bit internal quantizer
with a high-order modulation. As a result, in order to achieve the
resolutions and bandwidths required today, the sampling frequency must
exceed 100MHz. This approach leads to non-negligible power consumption
in the clock generation. Moreover, the presence of such fast squared
signals is not suitable for a system-on-chip comprising radio frequency
receivers.
In this thesis we propose a low-power strategy relying on a large number
of internal levels rather than on a high sampling frequency or modulation
order. Besides, a hybrid continuous-discrete-time approach is used
to take advantage of the accuracy of switched-capacitor circuits and the
low power consumption of continuous-time implementation. The sensitivity
to clock jitter brought about by the continuous-time stage is reduced
by the use of a large number of levels. An auto-ranging algorithm is developed in this thesis to overcome the limitation of a large-size quantizer
under low-voltage supply. Finally, the strategy is applied to a design example
addressing typical specifications for a Bluetooth receiver with direct
conversion.

 

[wave3x]

I am also a starter on sigma-delta ADC, nice to meet you here

 

[mvijay]

This report may be of some use.

 

[northeast1]

Hello, everyone, I'm a graduate student in China, it's very happy to join in you. I want to do some research of Sigma Delta ADC? Can you give me some advices? thank you very much. Excuse for my poor English.

Using matlab to build model first.

 

[icetools]

you need to read book ,it is <<understanding Delta-Sigma Data Converter>>.you should study matlab to build model

Added after 9 minutes:

I m new to this forum.
I m also doing thesis on designing of ΣΔ ADC.
I m just learned the delsig toolbox in MATLAB
I am interested in Hardware design
I am started OTA design but i am getting problem with the CMFB circuit
Is there any references or tutorials for this.
Please Help Me regarding this.
Thank You

CMFB circuit that you can read Paul gray << analog circuit design>>

 

[delta_912]

can anyone share with some paper about analyze sigma delta ADC output(before decimator) transient response...
thank you...

 

[ashish_chauhan]

I am totally new to matlab...

can ant one suggest from where to start..?

 

[zhaozenghui]

very good!

 

[wook]

This paper may be of some use.

 

[prashanth_iitkgp]

Hey..can any one tell me how to use sigma delta toolbox..i want to simulate 3rd and 4th order singe stage LP sigma delta modulators..Help appreciated..
I want to know the gain and feedback coefficients for the 3rd and 4th order LP Modulators.

 

[ttxz]

thanks all

 

[denap]

Thanks!

 

[tarzandavid]

Hi all, I'm designing a first-order 1-bit sigma-delta modulator using SIMULINK, but don't know how to set the parameter, can anybody help? Many thanks.

Btw, if put a sin wave as a input ,what the output shoud be? A sampled and quantized square wave?

 

[uroddy]

It's very useful to simulate in SIMULINK to get an idea of the amplitude and frequency of the signals in the different points of the modulator. You should specify correctly the simulation step and make that each block has the correct sample frequency. Also, if you want to see the fft of the signals you you use a correct number of points for the transform and you should see the range of frequency in logarithmic scale.

If your input is an sine wave, the output of the modulator(after the quantization block) should be a series of pulses of '0' and '1' that varies its number according to the input signal amplitude. You can take and idea from the Schreier and Temes book on sigma-delta ADC.

 

[arshaam000]

Demystifying Switched-Capacitor Circuits

Chapters 5 and 8.

 

[t_heidari_elc]

Re: delta-sigma adc design

hi i downloaded it but some file cant open ???????