m0945111
Newbie level 1
sigma delta adc paper site:edaboard.com
I TOTALLY agree with you...it's really difficult for beginners!
The one beginning with the "Understanding" Delta-Sigma or Sigma-Delta is easier, I think...although the authors might be the same and the terms or the main representations in the book are also similar.
Added after 25 minutes:
Definitely...I TOTALLY agree with you!!
I am a graduate students as well,
and I am now working on a Single-Bit 3rd-Order, CIFB SC SDM as my master thesis.
The fb=20kHz, OSR=128, fs=5.12MHz,
and the MATLAB Simulation results earns an SNR around 110 something dB (with the non-idealities considered in the MATLAB simulation alreay).
I use the process of TSMC 0.18 1P6M Mixed-Signal technology.
Unfortunately, I've been stuck at the procedure of circuit level simulation for a really long time!!
For the operational amplifier I use, basically it's just a folded cascode, or probably complementary folded-cascode (CFC) configuration with lowered supply voltage of around 1.0~1.3V...and that is really really hard to reach the goal!!
I've tried the bulk-driven technique to lower the power dissipation (it's really low by using BD!! WOW!), but the bandwidth is too small so I can't use it.
The output waveforms for every stage of my SC integrators are ALL SATURATED,
and I can do nothing about it alghouth I've been looking for the reasons and redesign many types of OPAMPs for like FIVE~SIX weeks!!
The deadline for the chip is Feb. 18, 2008, which is not too far away from now...
Without taping the chip out...I can't imagine what I will be facing in the future...
I know it's not a really tough spec for the Modulator itself,
but as the problems occur,
I have nobody to ask, to talk about (my advisor knows nothing about it @@),
or give me some advice...
Could anybody here with similar experience give me some advice or any idea for solving this problem?
Or any possibility that might cause the output waveform of the integrators would be a BIG HELP!
Please help me......I appreciate that very very much!!!!!!!!!!!!!
megzhuy said:Is it "Delta-Sigma Data Converters Theory, Design, and Simulation" suit for beginner?
I have one and I think it's very difficult for beginner.
I TOTALLY agree with you...it's really difficult for beginners!
The one beginning with the "Understanding" Delta-Sigma or Sigma-Delta is easier, I think...although the authors might be the same and the terms or the main representations in the book are also similar.
Added after 25 minutes:
samuel said:no practical example, sigma delta adc design is difficult.
Definitely...I TOTALLY agree with you!!
I am a graduate students as well,
and I am now working on a Single-Bit 3rd-Order, CIFB SC SDM as my master thesis.
The fb=20kHz, OSR=128, fs=5.12MHz,
and the MATLAB Simulation results earns an SNR around 110 something dB (with the non-idealities considered in the MATLAB simulation alreay).
I use the process of TSMC 0.18 1P6M Mixed-Signal technology.
Unfortunately, I've been stuck at the procedure of circuit level simulation for a really long time!!
For the operational amplifier I use, basically it's just a folded cascode, or probably complementary folded-cascode (CFC) configuration with lowered supply voltage of around 1.0~1.3V...and that is really really hard to reach the goal!!
I've tried the bulk-driven technique to lower the power dissipation (it's really low by using BD!! WOW!), but the bandwidth is too small so I can't use it.
The output waveforms for every stage of my SC integrators are ALL SATURATED,
and I can do nothing about it alghouth I've been looking for the reasons and redesign many types of OPAMPs for like FIVE~SIX weeks!!
The deadline for the chip is Feb. 18, 2008, which is not too far away from now...
Without taping the chip out...I can't imagine what I will be facing in the future...
I know it's not a really tough spec for the Modulator itself,
but as the problems occur,
I have nobody to ask, to talk about (my advisor knows nothing about it @@),
or give me some advice...
Could anybody here with similar experience give me some advice or any idea for solving this problem?
Or any possibility that might cause the output waveform of the integrators would be a BIG HELP!
Please help me......I appreciate that very very much!!!!!!!!!!!!!