Analog IC Interview Questions

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question No.4:
using positive feedback, stable?
 

Stablility and Oscilatory are two different aspects.

1. Assuming you have background in Complex Numbers, Linear Algebra.
2. Assuming you know Argand Diagram and Nyquist Plot.
3. Assuming you have background in Control Engineering and State-Space Analysis.

In AC Analysis of circuits, we analyse the Complex Mathematics.
If Real < 0, the circuit is stable.
Oscillation doesn't depend on Real. It depends on the Imaginary.

You can have Stable and Oscillatory, such as Oscillators in use today and some damped after some time. If the gain remains constant, it remains stable. Even the gain reduces with time, it is also stable.

You can also have Unstable and Oscillatory. If the gain increases with time, it is unstable and the circuit will breakdown.
 


Hallo SkyHigh!

The question that has been asked for was to plot the voltages at different nodes relating to the input voltage!
 

Hi eda4you,

You really make a good point! One small correction:
Based on your analysis, Ic4 = Vt*ln4/R ≈ 36mV / 36kΩ = 1uA instead of 1mA.

Hi SkyHigh,

This is not a wilson current source. Indeed it is a kind of current source.

regards,
jordan76
 


Thanks Jordan76!

I've replaced 1m by 1µ!

Do you know the pros and cons of this circuit or how it is called?
 

jordan76,

yes, it's not a Wilson current mirror. it is a Cascode MOS current mirror.
 

I have a further question (Interview Question):

Looking up into the source of a MOS transistor (say NMOS) in saturation (gate tied to 10K resistor to the supply) at low frequencies we see an impedance of 1/gm. As we go higher in frequency what do we see ? Do we see a higher impedance or a lower impedance ?

Thanks

A nice detailed response would be nice !
 


I believe you mean nmos in saturation.
If so, at very high frequencies source diffusion cap comes into play and reduce the impedance.
What happens at mid frequencies depends on how gate is driven. If gate drive is very weak, the impedance will go above 1/gm, may be well above. If gate is griven by inductor there might be even a resonance at some frequency.
If gate drive is very strong, the impedance would go lower with frequency in a monotonic manner affected by both gate cap and source diffusion cap.
 

Hello Steer,

I made an edit to my question and put it above, the NMOS transistor is in saturation with gate tied to a 10K resistor tied to the supply.
 

Puppet1 said:
Hello Steer,

I made an edit to my question and put it above, the NMOS transistor is in saturation with a drain tied to gate and a CONSTANT current source flowing through the drain.
Click to expand...

If the current source defines drain plus gate current, we'll see infinite impedance up to high frequencies when source diffusion cap reduce it. There is no 1/gm at low frequency.
Looks to me you meant something different.
 

you are right i edited it again !
 

OK, yours last circuit modification is what's implied in my initial answer.
 

so the impedance will start at 1/gm at low frequency then approach R (resistor tied from gate to supply) at high frequency - showing it becomes inductive.

right ?
 

steer, at first I was just as confused with the question Puppet1 asked.

Puppet1, I presume you are refering to a Pass Transistor using an NMOS, with its Gate tied to Vdd via a 10KΩ resistor. Looking from the Source, you are seeing a steady current because the Drain is supplied with a constant current source. The impedance is always lower than 1/gm in this case. This applies to DC and low frequencies only limited by the Cox and Rds. In Submicron, Cgs and Cgd are considered for all MOSFETs.
 

sorry i was confused

no constant current source
 

eda4you said:
Do you know the pros and cons of this circuit or how it is called?
Click to expand...

Hi eda4you,

It is a PTAT current source implemented in bipolar. However I have no idea about how it should be called.

regards,
jordan76
 

Are there any advantages over traditional PATS?
 

I think my basic concept is not good at all!
 

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