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Two transistor forward converter with bootstrap high side drive

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thanks, but you do agree that the bootstrap cap does not recharge via the lower freewheeling diode, rather, it recharges via the magnetising current going through the primary and then on thru the hi-side freewheeling diode?
In a sense, that's correct. The bootstrap current, the magnetizing current, and the lower freewheeling diode share a junction, so you can draw the currents flowing anywhere you want, so long as they sum to zero. I think most people would see the bootstrap current passing through the freewheeling diode, which can happen so long as the magnetizing current is larger, so that the net current in the diode is positive and it's forward biased. Both views are equally valid.
 
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I think most people would see the bootstrap current passing through the freewheeling diode

But surely current can go only one way thru the diode?....or are you speaking figuratively, kind of "in effect the cap recharges via the diode"?
 

The net current in a diode can only go in one direction.

Think of it this way, if the primary current is 1A, and the boostrap current is 0.1A, then the forward diode current is 0.9A. So you could say that both the bootstrap current and the primary current flow entirely through the diode, but in opposite directions. The net current is positive, so the diode is forward biased. Or you could say that the primary current is split between the diode and the bootstrap paths.

When currents from different paths enter a node, they mix up and become indistinguishable. The only thing that physically matters is the net current in each branch.
 
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Thanks,

Please may I now return to the question of magnetising current in a 2 transistor forward converter...the following example shows how significant the magnetiing current is...

**************************************************************
Here is the example of a 2 transistor forward converter with a ETD39.20.13 ferrite core, with N87 material, and a 0.2mm gap.

2 tran forward spec
Vin = 380v
Vout = 52v, 190w
Duty cycle = 0.38
Fsw = 100KHz
LP = 3.5mH; LS = 466uH
NP/NS = 2.74
L(OUT) = 220uH


Magnetising current peak is 413mA
Peak of secondary current referred to primary = 1.6 Amps
Pedestal of secondary current referred to primary = 1.06 Amps


….As you can see, the magnetising current ramps up to 413mA.
The primary referred secondary current has a ramp of 540mA.

So I conclude that the magnetising current ramp is a very significant part of the primary current.

ETD39.20.13 ferrite datasheet
https://www.farnell.com/datasheets/1859555.pdf

LTspice sim & schematic attached
 

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But what happens if you run it with absolutely no load on the output?

The output capacitor will charge right up to the peak voltage, the feedback system will then reduce the duty cycle down to zero.

How much flyback energy will there be then, to keep the upper bootstrap alive ?

That is what I hinted at earlier when I suggested that the bootstrap may need some help at extremes of duty cycle.
Being able to run with no load and with absolutely minimal input standby current may be a specified requirement.
 
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as long as you can pulse the lower fet, eventually the upper bootstrap cap will gain a charge....?
 
But what happens if you run it with absolutely no load on the output?

The output capacitor will charge right up to the peak voltage, the feedback system will then reduce the duty cycle down to zero.

How much flyback energy will there be then, to keep the upper bootstrap alive ?

That is what I hinted at earlier when I suggested that the bootstrap may need some help at extremes of duty cycle.
Being able to run with no load and with absolutely minimal input standby current may be a specified requirement.

I see your point, though this is a feature of all bootstrap high side drives as you know.

...but now we see the great advantage of the full bridge for what you point out...because the bottom fet is on for the complete half cycle even when on no load...run the simulation and see for yourself....that is the magic of using a full bridge driver ic to do 2-tran-fwd drive.

- - - Updated - - -

By the way, if you try to do the 2 tran fwd example of #64 with the ungapped ETD39 then you see what I mean. You get B going too high at max duty cycle when error amp is saturated, and non gapped ferrites can run away into saturation in such cases....also, if using ungapped, then its absolutely critical to have the core halves absolutely lined up.....with gapped cores, this isn't so critical.
The B is high enough with the ungapped case to make us use the gapped core set. The variability on B(sat) with a ungapped core is too much....not worth the risk. So we opted for the 0.2mm gap.
 

Its exactly why there are so many different topologies that on the surface appear to all do the same, or a very similar thing.
All have advantages and disadvantages, and tradeoffs, some of which can be quite subtle and less than obvious.

Its what makes the whole subject so fascinating.
 
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….As you can see, the magnetising current ramps up to 413mA.
The primary referred secondary current has a ramp of 540mA.

So I conclude that the magnetising current ramp is a very significant part of the primary current.
LTspice sim & schematic attached
That's because you put a gap in it. Without a gap Imag will go down by a factor of four, according to your own datasheet.

The variability on B(sat) with a ungapped core is too much....not worth the risk. So we opted for the 0.2mm gap.
Bsat is a material property, has nothing to do with gap size.
 
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But surely You agree that if no gap is used, the core halves have to go exactly together, or else saturation may ensue....careless assemblers can compromise your product. If there is a gap , then there is some margin, they don't have to be so exacting in putting together the core halves
 

But surely You agree that if no gap is used, the core halves have to go exactly together, or else saturation may ensue
No, why would it? Your Imag may increase quite a bit, but that's no worse than the effects from adding a small gap. You Bmax won't increase.
careless assemblers can compromise your product. If there is a gap , then there is some margin, they don't have to be so exacting in putting together the core halves
So you're increasing your core reluctance preemptively so that manufacturing errors will seem relatively less severe. I get that. You have yet do demonstrate why this is desirable for the product.
 
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Absolutely no gap is needed in a Tx in any type of forward converter, no gap = maximum Lpri = minimum Imag.

The design should allow for sufficient reset time, if you run the ON time too far, saturation and flux walking will result - its that simple...!
 
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I ran the calculation with etd39 and no gap....the magnetising current ramp is 137mA. (the primary referred secondary current ramp is 558mA) That's not insignificant...and as said, the variation in this is enormous...checking of it over all the range will be needed, which is too much effort for no point.
The saturation current is 220mA....which is too close to 137mA (don't forget it might be much more than 137ma at different temperature)

Surely we agree, add a gap, and have one value of AL value to play with, much simpler.

Bsat is a material property, has nothing to do with gap size.
sorry I meant I(sat)
 
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I fear, the thread discussion is going around in circles. Some points (e.g. about gaps in forward converter transformers) have been repeated now tenfold and more.

Strictly speaking, the gap discussion can be considered off-topic as long it's not referring to the specific question if it's possibly supporting bootstrap operation. If there are no new contributions related to this problem, the thread should be closed.
 
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