VFC design revisiting

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Hi FvM

It is surprising that I used *.cir model from analog devices for ADG1201 and it does not work. "does not work"means that I did not see any output pulses. I used existing model in LTSPICE and indeed circuit works right. I wonder what is the difference between these two models. Will this work in PCB? How to choose the op-amp. I want the output to be 1MHz. Accuracy can be around 1%
 

Did you check the ADG1201 symbol pin order thoroughly? We can't because you didn't provide the symbol.

It's not simple to predict the error due to finite OP bandwidth. I guess you need very fast OPs to keep the linearity error below 1%. Check it in a simulation.
 

Hi FvM

Let me stick to LTSPICE Model itself. Now Can you guide me which op-amp to choose as they are so many of them. In LTSPICE , I did choose randomly, but the results were gibberish
 

Hi,

There are Opamp selection guides (at distributors or manufacturers). You just need to input your requirements/specifications.
Read application notes regarding your application (VFC). Maybe you find information that tell you what feature to look for.

Don't be afraid of many results, be happy instead.
Choose the one that
* suits you most, or
* you have laying a
* that is cheap
* where maby on stock.
Before you buy one: read it's datasheet thoroughly.

Klaus
 

curious_mind said:
Let me stick to LTSPICE Model itself. Now Can you guide me which op-amp to choose as they are so many of them. In LTSPICE , I did choose randomly, but the results were gibberish
Click to expand...
I suggest to evaluate how OP parameters affect the VFC performance. You can start with the LTspice behavioral models opamp and UniversalOpamp2.
 

Thank you all. I did try with universal opamp2. The output frequency does not cross 100KHz, no matter what parameter I change. I guess there must be some key parameter such as GBW and slew rate that plays a vital role. I could not find too many app notes in this regard.
 

I designed the VFC as shown in the figure below. J6 is open. All other jumpers are closed. VCC and VEE are +15V/-15V respectively. I am unable to see any output waveform in U4A or U4B for VDC voltages are positive and negative. What could be the problem?

 

You cannot drive a LS123 directly from a LM111 operated off split supplies.

An LS123 input can only range from basically ground to its Vcc. I would not be
surprised if you have not burnt out the LS123's and or the LM111's.


Regards, Dana.
 
Hi,

I don´t agree with Dana with this.
The INA111 LM311 (see post#33 and #34) ouput is an open collector with a pull up to 5V and emitter to GND. So I expect 0V/5V levels.

*****
I think it may work.
But I don´t know your requirements.
* There may be more low cost solutions
* there may be more linear solutions
* there may be more accurate and more precise solutions.
* there may be smaller solutions
* there may be faster solutions
* there may be solutions that don´t require +15V, +5V, -15V

If you do this for learning ... it will be a good circuit.

Klaus
 
Last edited:
I have already built this board on PCB. But I find no output. Are there any gross mistakes in the design?
 

Hi,
curious_mind said:
But I find no output.
Click to expand...
I guess the output is pin4 of U5.

But maybe you are not satisfied with the signal on pin4 of U5.
Then first you need to give your requirements and your setup, (input voltage level, expected output signal ... level and timing)
then you need to start some debugging... on your own. We can´t do this for you.

Then follow the signal back:
* Inputs of U5 (= outputs of U4)
* inputs of U4 (= ouputs of U3 and U6)
* inputs of U3 and U6

Scope pictures of the signals (above) are useful.

Klaus
 


The print shows a LM111 ? A comparator, not an Instrumentation OpAmp ?

Regards, Dana.
 

Hi,

You are right, thanks.
--> Sorry, a typo. I´ve corrected my post above.

LM311 is a comparator with open collector output. According schematic it should work as desired.

Klaus
 

I concur with Klaus, I am in error, the LM311 has uncommitted collector AND emitter
on output. So application is not driving one shot out of spec. You have it wired correctly.

Regards, Dana.
 

I would like to confirm through this forum, whether the implementation scheme is right? If this is so, I think I may have to check the sanity of individual IC separately.
 

I'm missing specification of the intended input voltage range, also an explanation, why the circuit has been implemented so. Where did you get the concept? What's the purpose of the feedback path through U7?

Due to 74123 edge trigger, the integrator can latch and not recover on it's own, if the input has been overloaded.
 

The concept is based on integrator reset whenever the comparator input crosses the threshold. There are two comparators for supporting bipolar inputs. The input range is +/-10V. ADG1201 is a switch that would reset when the threshold is exceeded and the process repeats all over again. The circuit is designed for generating 10KHz/V.
 

Integrator time constant 10 µs, 1 V comparator threshold -> 100 kHz/V.

If I understand right, the reset time of about 10 µs is involving a significant nonlinearity, because the input signal is lost during reset.
 

Hello
this family of ic's are VFC " LM231A/LM231/LM331A/LM331 Precision Voltage-to-Frequency Converters " see the data sheet
 

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