Verilog Cascading 2 4bit full adders to get an 8bit adder

[xtolbert]

Hello, I know that in theory a very simple way to create an 8 bit adder is to cascade to four bit adders together, the code of a 4 bit adder is in this message. How would I go about writing the code in verilog to cascade two? And then output it to an LED Screen in base 10 digits?

module full_adder_4bit(
cin,
cout,
in_a,
in_b,
sum
);

parameter reg_size = 4;

input cin;
input [reg_size-1:0] in_a;
input [reg_size-1:0] in_b;
output [reg_size-1:0] sum;
output cout;

assign {cout,sum} = in_a + in_b + cin;

endmodule

 

[xtolbert]

quick note: I'm writing th code to tst out on an Altera DE-2 board if that helps

 

[xtolbert]

quick note: I'm writing th code to tst out on an Altera DE-2 board if that helps

 

[bigdogguru]

Here's an example of casading 4-bit adders in PDF:

Combinational Logic in Verilog

As far as, synthesizing it for DE-2, I'll need to find another example for you.