Transistor region of operation in operational amplifier

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Dear friends,

In the early steps of designign the op-amp is to select the appropreiate value of overdrive voltage (Vov = Vgs-vth) to meet different criteria (ICMR, OCMR, ...etc)

in the Jakob book procedure he use for long channel transsitor the rule of Vov = 5% VDD. in Holberg and Gregorian book the authors stated that if (Vgs -Vth) < 100 mv then transistor enter in to the weak inversion region, in the David Benkley book if Vov < -75 mv then transistor is working in the weak region.

You see the definsion from David book (attached a picture from it) is far from other defision, why ?

Second thing, the overdrive voltage is depending on the transistor current and size, Vov = root(2Id/K(W/L)), if we reduce the current or increasing W/L both will reduce the Vov, however I see people only talking about the weak inversion when they are dealing with small currents.

Can you please explain me a better approach to say whether my transistor is in strong, moderate and weak inversion region ?


Thank you very much
 

One approach I use (whenever I need to know the region of operation, which is actually not so often) is to plot gm/Id vs Vgs. The curve kind of saturates for small Vgs (even Vgs < Vth) and that's where the weak inversion region is. At high Vgs, the slope of the curve also reduces and that's the strong inversion region. In-between is the moderate inversion. If you are interested in specific transistor from your schematic, you can simulate the gm/Id vs Vgs for that one only by placing it in a separate test bench, connect Vds source with a value you have for that transistor in the actual schematic and then sweep Vgs and plot the curve. Then, on the curve pick your actual Vgs voltage from the schematic and see in which region it places the transistor.
 
Dear Suta,

Thank you very much for your nice explanation,

The method you propose it is interesting, I will keep it in mind to do.... nevertheless Cadence provide an operating region like region 0 region 1 region 2 where the last one indictaes the saturation region but not give whether it is strong or moderate or weak inversion.

What you answered actually was related to the simulation after design... my origional question was about in the design process when I size my transistors, you know that the higher W/L will lead to decrease the VDs(sat), call it the overdrive voltage for a specified value of current..so the more I increase the ration the more Vov decreases, and here is the question,, what is the minimum value of overdrive voltage I can design for it and still working not in the weak inversion ? this value has different numbers by different authors,

Thank you once again
 

They say you leave the weak inversion region at about 3 to 4x kT/q.

However, I don't think you design exclusively based on Vov. It shouldn't be your primary design variable, although sometimes it is. As analog designer you are mostly interested in things like gm, Ft, poles and the current you need to achieve them. So, develop your design procedure around these more meaningful parameters and Vov will come as a consequence because it is about equal to 2/(gm/Id). Then it is not unseen in newer technologies that transistors work with Vgs is below Vth when in weak inversion or at the edge of moderate inversion. Then what will be your Vov? Even more - what is your Vth? We assume Vth is the voltage when the channel is formed but transistors never turn on/off abruptly. In weak inversion carrier transport is by diffusion, not drift as in moderate inversion and so even below threshold transistor i s still conducting somewhat.
 
Dear Suta, Thank you for reply

I think you are suggesting me to use the gm/Id methodlogy, Right ?... for me I am desinging with 0.35 µm technology and therefore I am following the traditional metholodgy to design the circuit in which the overdrive voltage is a good parameter to size the transistors..

Anyway it is also interesting to ask if gm/Id method has better advantagues ? can you then please recommend some text book about it as all the books I have they only work with classical design approach

Thank you once again
 

gm/Id is just one method to use for design which is good for newer technologies but it doesn't mean it can't be used with older technologies too. What I was saying before was really related to what variable you use for your design - Vov or gm, Ft, etc.

A recent book about gm/Id is "Systematic Design of Analog CMOS Circuits: Using Pre-Computed Lookup Tables"
 

Dear Suta,

I did this simulation for one NMOS transistor, it has the following parameter from normal circuit run
W/L = 40 um/1m
VDS= 153.8 mV
VGS= 610.3 mV

In cadence I could verify it is working in saturation as I can read VDS(sat)=84.64 mV and region=2.

Then I simulated the transistor in separate test bench following your procedure and I get this graph below



can you please now further explain on how to confirm the region of operation in this graph according to my values ?

Thank you very much
 

sutapanaki said:
Now, plot and show here gm/Id vs Vgs.
Click to expand...

Indeed Suta I have tried to plot gm/ID but the claculator was giving me multiple graphs rather than one, this due to that I swept the VGS from the parametric analyses not by DC simulation setup,

If you tell me why I didn't simply sweep the VGS from DC setup, I will answer you in advance

When I do so the simulator plot for me the current as a graph but the value of the gm he give me one value saved in the output table of ADE, he is not plotting me a graph of it, I don't know why... it will be kind of you if you could help me in this manner as well.

Now I will tell you how I am getting the gm value: I go to output setup from ADE and open calculator, then I choose op (opearting point), then I select the transistor and choose gm from the list of parameters and save it to the output of ADE

Thank you once again
 

Look at this old discussion. The method of plotting gm or gm/id is summarized in reply #12


https://www.edaboard.com/showthread.php?15832-How-to-do-this-in-IC5

- - - Updated - - -

That tread I gave link to is pretty old - from 2004 and some things have changed since then. The idea is the same, though.

I just tried a simulation and it works. So, I created a file saveop.scs with only one line inside save * sigtype=all. This saves all OP parameters of the transistor. I included the file in ADEL Setup > Simulation files > Stimulus Files. Then I ran DC simulation. Open the Results browser and in the "dc" section you can see all transistor parameters. Choose gm and put in the calculator, then choose id and also put in the calculator. Create the gm/id expression and plot against Vgs (I assume you sweep Vgs of the transistor). You should get a plot looking like this:


 
Dear Suta,

Thank you for your nice reply

Can you please explain me how to creat saveop.scs file ?

Thank you once again for your help
 

Junus2012 said:
Dear Suta,

Thank you for your nice reply

Can you please explain me how to creat saveop.scs file ?

Thank you once again for your help
Click to expand...



Oh, that's easy. Just open a text file, write in it

save * sigtype=all

Then save it with any name and extension .scs. That's it.
 
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sutapanaki said:
Oh, that's easy. Just open a text file, write in it

save * sigtype=all

Then save it with any name and extension .scs. That's it.
Click to expand...


Dear Suta,

I am very sincerely grateful to your help, always you have perfect solutions..

Your trick is magically works,

below you see the results




below is the gm/ID graph



I pointed the actual value of vgs from schematic on the gm/ID graph

I am looking for your comment on the operating point condition of the transistor

Thank you once again
Regards
 

Provided your transistor is in saturation, then that Vgs voltage puts it into moderate or close to moderate inversion. In this plot it is very obvious where the weak inversion is, the flat part starting from about 0.3V and below.

If you instead plot gm/Id not vs. Vgs but vs. Vgs-Vth, you will probably see that you get Vgs-Vth < 0 before the actual weak inversion region.
 


Dear Suta,

Thank you very much for your reply

you are right, I also found this slide from Allen, the region where gm saturated is the weak inversion region,



in my gm/ID result graph this mean that the second region after say about 0.7 represent the triode rigon, right ?

One interesting question please, how you plot with VGS-vth ? because the x-axis is coming automatically VGS as I am sweeping VGS, how you manipulate this in the calculator ?

Thank you once again
 

Whether the region after 0.7 on your plot represents triode, I don't know. It depend on the value of the Vds that you have. Up until Vgs=Vds+Vth the transistor is supposed to be in saturation. In this case that last region on the gm/Id plot will be corresponding to strong inversion. In my plot I have limited the Vgs sweep to be no more than Vds+Vth, approximately of course.

In the DC sweep the x-axis is coming up as Vgs but you also have all the parameters of the transistors, because you included the saveop.scs file. Which means you also have Vth available to plot. Make an expression Vgs-Vth in the calculator, pretty much in the same way you make gm/Id and plot it. So, on the same plot you will have both gm/Id and Vgs-Vth. Now you have to change the x-axis. TO do this, right click on the x-axis of your plot. From the pop-up menu select "Y vs Y" and then from the new pop-up menu select Vgs-Vth in the "Select a Trace" and plot it in a new window.

Here is my plot. The vertical cursor is at where Vgs-Vth=0. See that it falls more or less in the middle of the moderate inversion region for my 16nm technology. And weak inversion starts somewhere at -100mV.

 

Thank you for your answer Suta, I tried your method and it is working. I can confirm from your graph ans mine that weak inversion starts usually at VGS-vth=Vov in negative,, so the concept of Vov= 100 mV as the down limit toward weak inversion is not right.. maybe designers are defining such value just to keep a safe distance from weak inversion region.

So Suta the transition from weak inversion put us in the moderate inversion region, the more we go to the right the stronger region we reach until the second flat region is coming then the transistor is not any more in saturation.

Please could you confirm that my conclusion is right
 

It is rather the concept of threshold voltage and what really threshold means, as well as how it is defined. Because you can see that even in weak inversion there is some conduction in the transistor, mostly by diffusion but conduction anyway. And the more or less simplistic square-law picture is that there is no current below threshold. This is one of the reasons why working with 2/(gm/Id) is better than Vov=Vgs-Vth. Especially at advanced technologies where the concept of Vth is becoming fuzzy.

Yes, if you go with your Vgs towards higher values, you eventually enter triode. I marked the regions (with limited Vgs) approximately in my picture.

 
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