The phenomenon of rapid currnet surge in an LNA MMIC

[thanhthien283]

I designed an LNA circuit that exhibits a peculiar phenomenon during measurements:

The LNA circuit is designed to operate at 4V with a bias current of 40mA. I measured and observed the S-parameters while keeping the voltage VD fixed at 4V, then gradually increasing the current (tuned by the voltage VG with very fine steps). The S-parameters and noise were observed to be stable as the current increased gradually. S21 increased steadily with the bias current when adjusting the VG voltage slowly. However, when it reached around 20mA, the current surged straight to 120mA (the measuring device fixed the current), even though the VG step was still very fine. At this point, the observed S-parameters showed a decrease in gain, a significant increase in noise, but S11 and S22 remained good (below 10dB).

However, when I performed similar measurements at VD=3V, the circuit behaved entirely normally, without such rapid current surges.

In simulations, I tried to find the cause to determine if this could be oscillation, but all the simulated parameters showed that the circuit was not oscillating (the stability factor, K factor, Kurokawa condition, at various bias voltages). I have the following concerns:

1. What is the phenomenon of rapid current increase while the S-parameters appear normal?
2. How can I identify the cause and resolve this issue?

 

[BigBoss]

It oscillates, sure. Simulations cannot show all phenomenal events like stability. Because they are all model based and environmental conditions might create unwnated events.

 

[mtwieg]

Curious. Wondering if it could be some thermal positive feedback. Does this always happen at the same VG and ID?

Could you try probing VD when this occurs? Would like to see how fast the transition is.

I'm guessing you're applying the VG bias through a high-resistance bias Tee. Could you try measuring the actual VG at the gate? Maybe some leakage current is causing VG to rise higher than you expect.

 

[dick_freebird]

VG sets the bias, but how?

Bare common gate rail is one way, basic mirror. But if there is an "active bias" for which the VG is only a reference, the amplifier circuit might be limited as to range of control and consequences. Might check app notes and electrical tables about that.

 

[vfone]

What is the phenomenon of rapid current increase while the S-parameters appear normal?

If the S-parameters are normal, the LNA is not oscillating. For example S11 goes positive when the LNA is unstable. When the LNA is working fine (as an amplifier), S11 values are negative.
Double check S11 (for entire range of the LNA and beyond), because this is a quick verification about the state of the amplifier.

 

[thanhthien283]

This is S-Parameter when measuring. When tuning the voltage VG, the current continues to increase normally until it reaches 20mA, then suddenly spikes to 120mA. It only occurs at 4V. At 3V, the current still increases steadily as normal, and the LNA operates normally.

--- Updated Today at 3:53 AM ---

It oscillates, sure. Simulations cannot show all phenomenal events like stability. Because they are all model based and environmental conditions might create unwnated events.

I'm afraid that's true, but currently I can't find the cause of the oscillation based on simulations and measurements. I need to identify the root cause to avoid oscillation in the upcoming tape-out

--- Updated Today at 4:10 AM ---

Curious. Wondering if it could be some thermal positive feedback. Does this always happen at the same VG and ID?

Could you try probing VD when this occurs? Would like to see how fast the transition is.

I'm guessing you're applying the VG bias through a high-resistance bias Tee. Could you try measuring the actual VG at the gate? Maybe some leakage current is causing VG to rise higher than you expect.

Thank you for your interest in my issue. I do not use resistors for biasing, only a power supply with bypass capacitor.

--- Updated Today at 4:12 AM ---

VG sets the bias, but how?

Bare common gate rail is one way, basic mirror. But if there is an "active bias" for which the VG is only a reference, the amplifier circuit might be limited as to range of control and consequences. Might check app notes and electrical tables about that.

Thank you for your interest in my issue. My LNA circuit bias through VD and VG of the transistor. My measurement method here is set VD at 4V first and then gradually increase the LNA's ID by tuning VG