Standard CMOS process Metal 1 polysilicon

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kitepassion

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Hi all,

Is it possible to use polysilicon on the Metal 1 layer?

Thank you in advance
 

i donot think you can do that as i recall from VLSI CMOS technology , unless something new has come out . go from polysilicon to metal 1 by via , because they are different layers and they donot adheal if placed over each other.
 

As Electro mentioned .... the Metal layer must be connected to the poly using a via as they are different layers ... the via represents simply a hole to reach a different layer .... always u can check ur design by running the 3d shape to check that all the components are connected correctly
 

Hi all,
Thank you for your quick reply. My interest is to make a capacitor with the same material of the gate of the mosfet. I can use a via to connect the two layer (poly gate and M1) where in the M1 I use doped poly instead of metal. I know I need to use a via to connect the gate and the M1 but is poly deposition possible on M1 layer? Some process allow me this?

Cheers
 

kitepassion said:
... is poly deposition possible on M1 layer? Some process allow me this?
Click to expand...

Don't think so: The usual polysilicon deposition process needs a temperature of about 600°C at low vacuum condition (s. this Wiki explanation, scroll down to Deposition methods). Really not good for the M1 layer! ;-)

You could, however, use a double poly process: 2 polysilicon layers separated by SiO2. Especiallly used for well reproducible capacitor and resistor matching for high-accuracy needing analog circuits (high resolution converters).
 
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