ueckid
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Try to make a better (shorter) connection from SMA ground to the PCB ground. At the moment, you have a bit too much path length there. Parasitic ground path inductance is as bad as signal path inductance.
Then for the parasitic signal path inductance, how can we eliminate it?
Short and direct connection from connector ground to microstrip (backside) ground. Your ground path with these connector (not designed for this side mounting) has too much length in the photo.
A while ago I had shown here that gaps in the ground, with some longer ground path through such SMA ground pins, results in poor S11 at high frequency. However, that trouble was at higher frequency, and 2.4GHz was not that bad.
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It happen to have in my EM simulator a circuit very similar to the presented one, on the same frequency.
Replicating the PCB transition that you have was almost impossible to get the 3dB loss that you mention (I got just 0.2dB)
Most probably my circuit use a different PA, but shouldn't be such difference. You may check for other issues, not only for this transition.
Those long wires and components on the bias networks, looks ridiculous for a 2.4GHz circuit.
For these bias circuits, use SMD capacitors with SRF at 2.4GHz (let's say a GQM1875G2E120JB12 from Murata), and low ESR electrolytic capacitors (tantalum).
However, as you can see in my attached pictures, phase of S-parameters between Sim. and Meas. deviate even in low frequencies due to some unintentional extra transmission lines somewhere. This leads to deviation of optimum load and source impedances seen by Transistor degrading large-signal performance including output power, gain and efficiency.
You didn't show the bottom side of the PCB, hence we can't know how good or bad the transition is. The connector shown in post #1 is a dedicated card edge receptacle as far as I see, but I don't know if the substrate height is matched.
Comparing simulation with measurement, how do you know that it's not the transistor causing the major deviation?
Your objectives are partly unclear. With an amplifier exposing positive gain only below 3 GHz, what's the purpose of having exact measurements up to 10 GHz?
The strongest deviation is seen in S12. Beside possible crosstalk around the PCB, we would expect the transistor and it's mounting as primary source of bad S12.
I don't get your point here - you seem to have 50 Ohm lines with 50 Ohm source/load, so the extra length will not change impedances seen by the DUT.
I think the bias network has been designed well. For RF short, a radial stub was used at one end of a lamda/4 line. I have evaluated this bias circuit in EM simulation.
Sorry that I have to insist, you may design and simulate well the bias circuit, but the practical implementation you did is wrong.
I think we're discussing different aspects here. Phase shift doesn't always mean change of impedance.
The impedance measured into the amp - as seen from the load side - moves around the Smith chart when you add line length in between. But the impedance seen from the amp into a 50 Ohm load remains 50 Ohm, no matter how much 50 Ohm line length you add in between.
Sorry that I have to insist, you may design and simulate well the bias circuit, but the practical implementation you did is wrong.
Practical implementation of the decoupling bias network has a huge impact on the performances of this kind of PAs:
**broken link removed**
I also don't understand your concern. The large "non-RF-style" elements behind the radial stub are on the DC-side of things.
I am sorry I don't really get your point, Do you mean a lamda/4 terminated with a radial stub at one end is not practical?
Lamda/4 terminated with a radial stub at one end IT IS practical, but what you have in your real PCB board is NOT practical. Follow what is written in the link I posted and you will get good results.
Use only SMD passive components, with the right values.
From an EM simulation on a similar circuit, the small layout mismatch that you have on the output SMA connector is not giving 3dB extra loss.
But a small decoupling mistake on the bias lines would give what you get (loss in power, less linearity, less DC efficiency, etc.)
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