Size PMOS 2 or 3 times larger than NMOS in the inverter?

[srieda]

the current through the mos control the rise and fall times. as the only thing which is advisable to vary are the (W/L) ratios of pmos and nmos, we can tweak them to get symmetrical rise and fall times. as far as I am concerned, there is no need to look for any other parameters..

as for a circuit to sense the perfect transition - u may have to go for a closed loop amplifier with CMFB so that the drive strength is varied until the output reaches 'vdd/2' for an input of 'vdd/2'

hope this helps..

@all: any other bright ideas for sensing transition and varying drive strength?

 

[dozy_walia]

^
I was talkin about the circuit to sence the transition!
As u must be aware of miller effect which causes delay in IC's!
I am working towards sensing the transitions or bit patterens on the wire so that strength of repeater can be varied dynamically!

Added after 1 minutes:

Opposite transition or bit patteren are the worst case for delay due to miller effect!

Any circuit or Logic to sense this??

 

[srieda]

i was talking about this... tuning the inverter dynamically to get perfect ratios..
sorry but i did not understand your requirement.

 

[dozy_walia]

Thanks!
However, I am looking for transition or bit patteren sensor and this too should be implemented in an IC and hence should be smallest possible!