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Simulation problems using veilog-a

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hustwill

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simulation problems

I wrote a behavior model of VCO using verilog-a, then created the simbol.
Then, I create a simulation schematic to simulate the VCO in Cadence composer.
When I simulation with spectre, I don't know how to set the model libraries, so I just passed it. When I simulated, the simulator said that "Could not open ahdlcmi module library."

I don't know how to solve it, can anyone help me?

Is there anyone has some materials about verilog-a simulation? can share with me ? If OK, please send to : william8542@gmail.com
 

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