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SEPIC dc dc converter power supply 24W [12V@2A]

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seridj_mse

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dear experts ,





After a hard #work 😮‍💨to reduce noise for certify our equipment directive CISPR 16-2-3 class B with LNE , i had basically tow problem :


1- harmonics 50 MHz oscillator for Ethernet 10/100M design in mother boar. that is not the point of this post.


2- noise in power supply of our mother board we use a SEPIC DC DC converter 24w large input 9-30v and fixe output 12v@2A. for conducted emissions it was good 👍 but for radiation emissions it was very Noisy 👎 so I started dig into the issue and what is the source of this noise, hot loop as small as possible🙃, ground MOSFET as close as possible to gnd output capacitor🙃, change référence of components with better intrinsic characteristics 🙃change PCB placement and layers 🙃.... keeping in the mind 🤔 the price of those changes 🤑and the most important thing the right functioning of the board 🤷🏿‍♂️


So now i can say i was very successful reduce noise 😎 but when i measured temperature of components, the surprise🤬 :



-Before modification at max load 2A :


- Coupled inductor : 49°

- Diode : 55°

-Mofet : 45°


After modification :


- Coupled inductor : 64° 🔥

- Diode : 68° 🔥

- Mosfet :77° 🔥🔥


Note : i take those measurements with my old multimeter and K probe thermometer 🌡️

So maybe i know why 🧐 i use a 50R for gate Mosfet so i think 💬 i should find another method like use 4 layers 🙃 PCB.


TO YOUR KEYBOARD for any help 🤠
 

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Separate local PGND plane or copper pour can be an option to keep switching interferences from spreading into the common GND plane This has nothing to do with using separate AGND and PGND pins at the switching regulator.

Prerequisites are:
- use filter inductors for in- and output power lines of the switching regulator block
- have sufficient bypass capacitors inside the switcher block, particularly for the discontinuous buck converter input.
- connect PGND and common ground plane in one point. In PCB design terms, use a net connector or starpoint component to achieve this

1670499884726.png


Here's the PCB implementation. Output filter not shown. The via on the left side is the net connector.

1670500514479.png
 

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Trying to model the emc is a complete waste of time as the real world results will be very different due to parasitic damping effects and different gate drive ...
 
Trying to model the emc is a complete waste of time as the real world results will be very different due to parasitic damping effects and different gate drive ...
yes and what is the solution , i know that and that why i try to find solution and gather information
 

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