Relative phase compensation technique

[Maitry07]

Hello support team,

I am working on a high speed ADC + FPGA . High speed ADC is multi channel that can take CW tone RF input and convert it into decimated I,Q digital data through DDC technique. I am providing 40 MHz RF input to high speed ADC channel 1 and channel 2 with the same cable length through function generator. My FG's channel 1 phase is 9.058 deg while My FG's channel 2 phase is 0 deg. FYI: I have checked my input's phase difference in MSO and validate that it is 9.058 deg

My FPGA is capturing decimated digital I,Q data for both the channels simultanously and I am using CORDIC IP core to convert the I,Q to absolute phase for both channel 1 and channel 2.
now, I am using subtractor IP core to have a difference between absolute phase 1- absolute phase 2 to generate relative phase.

and when I am checking output of relative phase , it is approximately 15 deg instead of 9.058 deg. weather this variation is due to slight mismatch between both the front end channel of my high speed ADC?
FYI: I am using AFE7900 High speed ADC.

What need to be done in order to compensate this relative phase misatch? is it ok to subtract 6 deg from the final relative phase output or any other proven method you can suggest to compensate this relative phase mismatch?

Awaited your response. if you need any other details, do let me know.

 

[Maitry07]

I am looking at difference (relative phase) not the absolute phase. my input phase variation is fixed such as 90 deg. variation remains same and both inputs are in sync as well as DSP to generate absolute phase for both channels are also in sync.
the data I am seeing is before averaging at near full scale

 

[KlausST]

I am looking at difference (relative phase) not the absolute phase.

I´m just asking myself: Is there something like "absolute phase" at all?
Doesn´t phase measurement always need a reference signal? Like phase V to I, or phase V to V.

Klaus

 

[kaz1]

I am looking at difference (relative phase) not the absolute phase. my input phase variation is fixed such as 90 deg. variation remains same and both inputs are in sync as well as DSP to generate absolute phase for both channels are also in sync.
the data I am seeing is before averaging at near full scale

Let me explain and I leave it to you:
I can think of three methods to get phase difference between two tones.
1) look at peaks only or zero crossings of the two tones and compare/average. This will give you resolution no more than one sample per cycle as I explained above.

2) push tones down to dc then you get rid of cycles and you can average all samples. This is best method in my view

3) do fft and you get one bin per tone to get I/Q phase in frequency domain.

 

[Maitry07]

Hello,

Yes I applied 2nd method and push down my 40 MHz CW RF tone to dc after DDC to get rid of cycles. and further analyze the same. I again analyze my output. the below remains same for 40 MHz .
generator setting----oscilloscope---- your measurement
0---------------------- 2.8--------------------5.3~6
90--------------------- 92.5------------------ 95.4~96.1
270--------------------273-------------------275~276

I have further analyze at different RF frequencies . below is the variation I am getting with DDC output =3 MHz or DC.

Frequency( MHz ) ----------oscilloscope ---------measurement
35 to 38 MHz----------------2.8 .....................................max 5.1
39 to 42 MHz----------------2.8---------------------max 6
43 to 46 MHz----------------2.8---------------------max 7.5
47 to 50 MHz----------------2.8---------------------max 8.3
51 to 56 MHz----------------2.8---------------------max 8.8
57 to 60 MHz----------------2.8---------------------max 9.8

so this fix variation is dependent on frequency and it is fixed in any scenario of phase difference either 0, 90, 270 or any other. Now can you further check and let me know what could the reason and can I compensate this fix offset of phase difference? and why what is the reason

 

[kaz1]

I have a bit doubt how you are pushing down to dc.
Are you applying (-40MHz) at DDC i.e. (-RF)?
would all RF cases end up as 3MHz?
Or are you applying (-3MHz) in all cases?

are you sure you get dc levels on I/Q at the end?

 

[D.A.(Tony)Stewart]

your compensation method seems valid but the cause is unknown.
averaging improves resolution.
phase shift is due to BW limitation

 

[Maitry07]

I have a bit doubt how you are pushing down to dc.
Are you applying (-40MHz) at DDC i.e. (-RF)?
would all RF cases end up as 3MHz?
Or are you applying (-3MHz) in all cases?

are you sure you get dc levels on I/Q at the end?

My high speed ADC's sample rate is 1966.08 MSPS. DDC decimation factor is 32. I am applying 40 MHz RF input to high speed ADC input. To push down to DC, my NCO frequency I am keeping same as RF frequency, in this case 40 MHz. and yes I am sure I am getting dc levels on I/ Q at the end. I have validate this in complex FFT domain as well. I am getting DDC output tone at DC (0 Hz).
To vary DDC output frequency, I am varying NCO frequency.

--- Updated Today at 3:31 AM ---

Also I have found one more observation. Let me give a detailed brief for this as well.
My High speed ADC is having 4 identical input channels. up till now, I have done the above analysis for relative phase measurement between channel 1 and channel 2. so below is the measurement for channel 1 and channel 2.
Frequency( MHz ) ----------oscilloscope ---------measurement
35 to 38 MHz----------------2.8 .....................................max 5.1
39 to 42 MHz----------------2.8---------------------max 6

after that, I have tried 3 more combination.

channel 1 and channel 3
Frequency( MHz ) ----------oscilloscope ---------measurement
39 to 42 MHz----------------2.8---------------------max 6.6

channel 1 and channel 4
39 to 42 MHz----------------2.8---------------------max 5.6

channel 2 and channel 3
39 to 42 MHz----------------2.8---------------------max 2.8
( That means , there is no compensation required for the relative phase measurement between channel 2 and channel 3)

all above is done with DDC output : DC (0 Hz)

 

[kaz1]

keep your test simple with minimum variables. Just connect same signal to two ADCs. This should give zero phase.
Target dc by setting NCO to -RF then if you don't get zero phase either the NCO phase is playing or your logic needs check.

You can directly check the final I/Q dc levels and tell us what are they.