RC circuit

[Sambhav_1]

Hi,

I am wondering if there is any tricky rc circuit question with current source input which is little hard to solve for the newbies in industry

 

[barry]

Yes, there is.

 

[Easy peasy]

for example, 1A current source into 1Meg ohm & 1F RC ckt - what is the final voltage on the capacitor ?

 

[barry]

for example, 1A current source into 1Meg ohm & 1F RC ckt - what is the final voltage on the capacitor ?i hope

for example, 1A current source into 1Meg ohm & 1F RC ckt - what is the final voltage on the capacitor ?

I hope you don’t find THAT tricky.

 

[Easy peasy]

tricky for many on here I suspect ...

 

[timof]

Here is a good simple question, that would tell right away if a person understands circuits and RC effects -

A delay from a driver to a receiver needs to be minimized (or reduced).
This delay is affected by parasitic R and C elements on the signal net.
Should one make a metal line (leading from the driver to the receiver) wider or narrower, to reduce the delay?

 

[Ans5671]

@timof
By widening the Metal width, resistance decreases, and at the same time parasitic cap to the substrate increase. So maybe a medium width. But how to quantify it?
Do you have the answer to the question you posed?

 

[barry]

@timof
By widening the Metal width, resistance decreases, and at the same time parasitic cap to the substrate increase. So maybe a medium width. But how to quantify it?
Do you have the answer to the question you posed?

Agreed. That question doesn't give enough information. Further, inductance also figures into delay, not just R and C.

 

[timof]

Agreed. That question doesn't give enough information. Further, inductance also figures into delay, not just R and C.

Most of the questions posed by real life (engineering, technology, production, research, ...) are like that - not well- and clearly-formulated task (unlike standardized tests in schools), not enough input information, trade-offs, constraints, conflicting requirements, etc. - so YOU have to figure that out, formulate the question (to formulate a question well means that the problem is already 50% solved), ask for additional inputs, define the trade-offs, formulate the solution in "if-then" manner, etc.

Inductance is important in clocks and other top-level, massive systems with high switching activity - but not that much in lower level signal nets.
I believe that standard timing analysis tools (like PrimeTime or Tempus) do not account for the inductive effects, for the majority (~99%) of the nets.

--- Updated Jun 3, 2021 ---

At the interviews, very often, it's important not just to give the right answer - but to show your reasoning, your take, your approach to a complex problems that does not have a simple "Yes/No" answer. That reveals both technical knowledge, and - personality traits.

--- Updated Jun 3, 2021 ---

@timof
By widening the Metal width, resistance decreases, and at the same time parasitic cap to the substrate increase. So maybe a medium width. But how to quantify it?
Do you have the answer to the question you posed?

Yes, I do.

Both extremes - too narrow wire, and too wide wire - are bad, obviously.
The optimum is somewhere in the middle.
(you can lo do wire tapering - so an additional question is - should you make it wider near the driver, or near receiver, to minimize the delay?).
And to tell where this optimum is, you need to find what's the impact of that wire on the delay - by its capacitance, or by its resistance.
Do not forget about other factors - driver strength, and load capacitance.
And keep in mind, that the "wire" may involve many (10-20) metal layers and via layers - each of them having a different impact.