Questions about pll jitter

[amarnath]

the ripple is caused due to the up and down pulses generated by the pfd even after the pll has acquired lock.so the cause of your problem is the pfd.

regards
amarnath

 

[jerryhuang]

2 amarnath
the pfd works at 20Mhz,why the ripple frequence is 120Khz?

 

[amarnath]

dont worry about the frequency of the ripple,just worry about the amplitude of the ripple.i advise you to change the value of the loop filter capacitance and see the amplitude of the ripple.

regards
amarnath

 

[vbhupendra]

you can use eldo for eye diagram

 

[amarnath]

u can also do the same using the functions in the calculator of cadence ic.

regards
amarnath