newuser33 said:have u guys checked out the new pic 32 starter kit board?
it uses a single 18lf4550 and has connections to jtag and ICSP on the pic 32.
can this be done for pic24 and dspic for an easy USB programmer?
they use the 28 pin DFN chip and thats it.
Looks very well and professional.:!:Jose Fausto said:Hi Friends
Finally this is my ICD2 PCB...
tijoseymathew said:can i programm the 18f4550 and 16f877 using lvp?? for potyo's and pics version ?
iggyboy said:I am not very sure about the debugging part. I just build your Junebug. I have noticed an error in the schematic (+D and -D swapped according to standard USB type B connector pinout), I connected it anyway and of course it did not work. I quickly made a few measurements and finally decided to swap them. It works, can program etc. but won't enter into debug mode. This is testing with a 18F4550. So, my ICD clone and your Junebug are a pretty equal match if you ask me. If I program only and then release the target - all is well. Equal behaviour.
Done a quick test with a 16F877A too. Everything works, including debuging. I really don't get it. Tried with all kind of oscillators checked the debug ports to be enabled, the lot. No success.
Damn.:|
I am beggining to think what my problem is. Before you dive into this problem, let me point out that my Junebug is not entirely built to the specs. I use different transistors and a 100u inductor. The inductor should be bigger, but I really do not have anything else lying around. The ferrite bead is also missing, but that probably is no biggy. Electrolytes are off by 50%+ for the smps and 10x lower for the pic, but this again should pose no threat to the application. And ofcourse, I use 4550 in Junebug, yes, pins rerouted.
;*** Unicorn 18F4550 crystal test
; Requires Inchworm or Junebug debugger
; Open a Watch window and "Add SFR / OSCCON"
; Make sure MPLAB 8.01 is in Debug mode
; Build All, Program, then Animate
; OSCCON = 0x48 crystal OK
; OSCCON = 0x44 crystal failed
list p=18F4550
include <p18F4550.inc>
CONFIG FOSC = HSPLL_HS, WDT = OFF, LVP = OFF
CONFIG FCMEN = ON, IESO = ON, PBADEN = OFF
CONFIG PLLDIV = 5, CPUDIV = OSC1_PLL2
org 0
loop nop
bra loop
END
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