Power Mosfet datasheet test circuit Rgext value- switching times

[jumbodas]

Nearly every vendor has similar test circuit for switching times. It uses an external gate resistor. Switching time strongly depends on this part.
Does anyone knows how suppler decided value of this part? I mean precisely how it is determined the right value for test circuit. I mean what is the clear criteria to use a particular value.
I understand too low will cause ringing, too high will increase switching times but what is the exact criteria to select a specific value?

If you know the answer, please do share this is your opinion or this is what vendor reported. Thankyou.

 

[KlausST]

Hi

sadly I don´t know the answer regarding math and formulas.

It´s always a compromise and the designer needs to decide which way to go.
What plays a role:
* mosfet
* switching times
* driver circuit
* PCB layout
* schematic
* application requirements

***
For example: on a bad layout you have increased stray inductance, thus the increased risk fro ringing. You need to compensate the bad layout with increased series resistance to .. and reduced switching speed .. and increased switching loss.

Klaus

 

[ahsrabrifat]

You may find these helpful:

 

[dick_freebird]

Every power MOSFET has a drain dV/dt which can trigger bipolar snapback conduction (bad). The minimal gate resistor to prevent this given the drive source and Cdg particulars, may be what you see (larger does not benefit the spec).

 

[jumbodas]

You may find these helpful:

Unfortunately no but thanks for sharing....vendors use much higher value of Rg compared to reasoning in this video. It has to do with something else...and it can't be that a lower value will blow the mosfet..if his was the case all datasheets will come with waring to limit the input rise time. To me this is a mystery. Can it be max gate current?

--- Updated Mar 24, 2025 ---

Every power MOSFET has a drain dV/dt which can trigger bipolar snapback conduction (bad). The minimal gate resistor to prevent this given the drive source and Cdg particulars, may be what you see (larger does not benefit the spec).

DV/Dt will apply to turn off that is fall time not the rise time, moreover if this was the case all datasheets will come with waring to limit the input slew rate.

 

[Easy peasy]

Really the Rgate value(s) are application specific - to fast a turn off with inductive load can volt spike the fet and kill it

too fast turn on can do the same thing to diodes in the circuit ( sec side of transformer for example ) and cause high di/dt and RFI into control

there is no one answer for a specific mosfet.

 

[KlausST]

DV/Dt will apply to turn off that is fall time not the rise time,

it depends.
If you have an N-Ch MOSFET, and connect the Emitter to GND (the most often used test circuit),
then at switch OFF you have a rising voltage at DRAIN.
--> rise time
***

I´d say the test circuit (datasheet) is adjusted to the MOSFET. (Maybe even to the test equippment)
Semiconductor testing is on part that contributes to the end price of the MOSFET. Thus they try to keep the testing time low. (Time = money)
Also the test circuit is not ideal (I´ve worked for a comany that builds semiconducor testers).
So they need to find the best compromise between testing all desired values in the shortest time. And as already said, too low a gate drive resistance will lead to oscillation, which needs to be avoided. (testing time, test result precision)

For sure other factors may play a role. Like the expected use case of the MOSFET, showing the area of best performance ...

Klaus