Possibility on interfacing Altera Cyclone with PCI or PCI - E ?

[bianchi77]

Why, exactly? Missing clamp diodes might be an issue, if you don't use any external level translators in a 3V PCI design.
I must confess, that I never attempted to implement a PCI bus with direct connected FPGA. Thus I'm possibly not aware of all detail problems.

Everyone is using Quartus with Altera FPGAs. Even if you are using a third party design compiler, you'll still rely on the Quartus tools to translate the netlist to hardware level. But I don't see a reasonable purpose to replace the Quartus compiler.

Hi FvM

I can compile succesfully after doing :
" To source the constraint file, type the following in the Quartus II Tcl
console...."
Page 7, PCI compiler release note.....

But I have a question, why some of the pins still blank, shall I assign manually or just leave it empty ?
thanks


Some of the pins already assigned automatically when I did "sourcing constraint file"
" source <Tcl filename>.tcl
add_pci_constraints [-speed "33" | "66"]
[-no_compile] [no_pinouts] [-help]"



You're right, I can't use bank 2 and for because of the clamping diode....
there's a way for 5V PCI, put R2 on between of them...it's 164 ohm, but I'm gonna use 160, can not find 164 in market except I put them on series...


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To FvM
there's a warning on compiling message :
Warning: Megafunction that supports OpenCore Plus feature will stop functioning in 1 hour after device is programmed

does it mean that I must buy the library ? expensive $2995.....
do you have other way to cut the cost ?

 

[TrickyDicky]

Yes you would need to buy the library.
The only way to cut the cost is implement the PCI core yourself. And its rather complicated. You'll need the PCI specs. Seems like theres a copy up here: https://www.ics.uci.edu/~harris/ics216/pci/PCI_22.pdf

 

[bianchi77]

Yes you would need to buy the library.
The only way to cut the cost is implement the PCI core yourself. And its rather complicated. You'll need the PCI specs. Seems like theres a copy up here: https://www.ics.uci.edu/~harris/ics216/pci/PCI_22.pdf

Yes I have that file already, so I need to define myself in VHDL.....
define the port, timing, addressing, sending data, etc.....
don't you have any other library for this ?
or try to mimic from megacore, do yo know where's the entry point and the library ?
I'll to find it myself but it would be faster if I ask someone else who knows about it...

do you have experience in developing PCI card yourself ?
Thanks for the clue

 

[TrickyDicky]

The PCI core from the megafunction will not have the source code for you to copy - I think it's encrypted.
Whenever Ive done PCI or PCIe - I use the megacore because we had full quartus subscription licences.

Developing your own PCI core will be a massive job - I suspect several months work.

 

[bianchi77]

The PCI core from the megafunction will not have the source code for you to copy - I think it's encrypted.
Whenever Ive done PCI or PCIe - I use the megacore because we had full quartus subscription licences.

Developing your own PCI core will be a massive job - I suspect several months work.

so i need to buy the library ?
is there any student version for megacore ?
thanks

 

[FvM]

Other option: Using free PCI IP, e.g. from opencores.

 

[bianchi77]

Other option: Using free PCI IP, e.g. from opencores.

Ya I read that one too, do you have the link ? and how to use it with Quartus II, do you have ideas ?
thanks

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Other option: Using free PCI IP, e.g. from opencores.

to FvM,

Do you mean these ones ?
https://opencores.org/project,pci32tlite_oc
https://opencores.org/project,pci,home

Do you have experience on how to use it with quartus II ? or it's the same way I use PCI compiler ?

thanks

 

[FvM]

Do you have experience on how to use it with quartus II ? or it's the same way I use PCI compiler ?

As already said, I didn't yet implement FPGA PCI interfaces, neither Altera Megacore nor Opencores. Generally speaking, using free IP involves some porting. Design quality can be quite different.

 

[bianchi77]

As already said, I didn't yet implement FPGA PCI interfaces, neither Altera Megacore nor Opencores. Generally speaking, using free IP involves some porting. Design quality can be quite different.

I can manage compiling pci32lite, but I have a question regarding pins,

How can I define the exact pins ?
Please see the screen shot,

Thank you

 

[FvM]

How can I define the exact pins ?

By specifying individual pins for location, as with any FPGA compiler tool.

 

[bianchi77]

By specifying individual pins for location, as with any FPGA compiler tool.

so i need to define 1 by 1?

 

[TrickyDicky]

so i need to define 1 by 1?

Yes. Each bit of every bus has to have a specific pin. Luckily, you dont have that many pins to connect.

 

[bianchi77]

Yes. Each bit of every bus has to have a specific pin. Luckily, you dont have that many pins to connect.

Ok thanks for your advice, anyway do you have a footprint for PCI connector for altium ?
or you have other suggestions ?
I've been thinking on drawing it myself but not sure about the dimension...
I can see the schematic but I don't have the pads ( footprint ), if there's none, no choice I need to create myself,


Are they all the same on every motherboards ?
I checked on my Pentium 4 motherboards it's 5V 32 bits PCI connector



Do you have a pcb pin pad dimension for PCI 32 bit 5 V or PCI 32 bit 3.3V and 5 V ?




thanks

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or I'm gonna use PCI 32 bit riser
**broken link removed**
and connect the female connector on it into my pcb ( adaptor )..

What do you guys think ?

I read from PCI local bus specification page 180, but the distance between pin is not clear...
I want to have exactly like this one :
https://contentstore.live.altium.com/TemplateDesignDetail/PDE-0001-00114

I'll draw manually based on PCI card on my motherboard

 

[bianchi77]

Where is pin A1 ?
is it at the bottom side of the PCB near to the backplate ?

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Where is pin A1 ?
is it at the bottom side of the PCB near to the backplate ?

 

[FvM]

Where is pin A1 ?
is it at the bottom side of the PCB near to the backplate ?

Yes. I think, it's clear in the PCI spec. The same for the connector dimensions.