PLL phase noise changing with reference divider

[Mazz]

I think we can make a summary now:

-you're experienced.
-your block diagram is a simplified one, that's ok, you explained the noisy spectrum.
-you've tested each block with no issues and the full system as well.
-so you're sure that there is no oscillation. I would agree with Rich, but I trust in you when you're saying that many tests have been done. If oscillations would appear you should have seen them.
-you say that the only issue is related to different configuration of PLLs and it gives you not always an unacceptable SNR, but only in some cases slight degradation of SNR, like the classical rotation in the constallation diagram seen when there is too much phase noise added.

I suppose that there is a very laaaarge gain in this system, I'm supposing your issue comes from some intermodulation product between actual signal and some spur generated by PLLs. This is very intuitive, I've not done any calculation (yet).
Having a signal/noise/linearity budget will help to understand if my idea is correct, you can see if some spur can fall into your useful bandwidth.

Did you try slight different LO frequencies between TX and RX to understand if the issue is in TX or RX?
Did you try to replace these PLL with signal generators?

I would like to give some more help, but it is not easy as you're giving few info about this project (and I understand why).

Mazz

 

[mtwieg]

Not what you would expect, huh? In a scalar world, you end up with the same scope traces, only the one with the bpf installed is slightly smaller in amplitude.

(The slight ripple on the scope traces is the LO leaking thru at 865 mhz, the scope was set to lpf ch1 and ch2 at 250 Mhz)

Rich,

Wow, I'm impressed you went to the trouble of doing a practical demonstration. Well the result actually is pretty much what I would expect; the amplitude of the downconverted SSB signal is about half that of the downconverted DSB signal. I should clarify that we also have multiple pairs of TX and RX, which we want to send in closely spaced channels. That is why we are using SSB instead of DSB; to allow more channels to fit inside a given bandwidth without overlapping each other. But that's aside from the issue we're having trouble with it, which manifests when only one TX/RX pair is active.

---------- Post added at 15:09 ---------- Previous post was at 15:07 ----------

Your correct, What I'm proposing will not solve your problem,is just an idea that i have used in the past. Based on the spectrum plot you provided, i would replace the PLL with an external signal generator to see if the problem is in the LO or signal path. If the problem is still present, you may have an oscillation in the signal path. I'm assuming you have checked the LO spectrum far out to see if there are any issues.

I ran the idea by him, and he likes it. Sure beats making high order LC filters for each carrier. But at this point everything's already built and tuned, so unless we can be convinced that our problem lies in the sideband or carrier suppression, it's probably not worth the effort right now. But we will keep the idea in mind in the future, thank you.

Your idea of replacing the PLL/VCO with a known signal source is good, but we don't have a way of generating such a stable signal. The closest we can do is use the output of our VNA (which goes to 1.5GHz) operating at one frequency, but it can't make a perfectly continuous signal (it can only put out bursts). So we can't use that in an actual experiment with our real setup (which can take minutes).

---------- Post added at 15:47 ---------- Previous post was at 15:09 ----------

-you're experienced.

Not quite. I've never used PLLs in RF systems before, so I've never had to worry about nuances like this.

-you've tested each block with no issues and the full system as well.
-so you're sure that there is no oscillation. I would agree with Rich, but I trust in you when you're saying that many tests have been done. If oscillations would appear you should have seen them.

I wouldn't rule it out. It's possible that we just don't know how to spot the problem we're looking for. One other annoying bit is that we only have 500MHz oscilloscopes, which makes looking at the carriers directly sort of difficult. That's why we've been relying on our spectrum analyzer for diagnosis. But I'm not sure what an oscillation in phase or frequency would look like. Would it manifest as a broadening of the carrier's bandwidth, or as discrete spurs spaced apart from the carrier?

-you say that the only issue is related to different configuration of PLLs and it gives you not always an unacceptable SNR, but only in some cases slight degradation of SNR, like the classical rotation in the constallation diagram seen when there is too much phase noise added.

The result isn't a change in our noise floor as it is a spectral "smearing" of the downconverted signal. That's why I suspect it's some kind of frequency/phase error between our two PLLs. Whether you'd call is noise or an oscillation, I'm not sure.

I suppose that there is a very laaaarge gain in this system, I'm supposing your issue comes from some intermodulation product between actual signal and some spur generated by PLLs. This is very intuitive, I've not done any calculation (yet).

Maybe, but where should such intermodulation occur except inside the PLL or VCO? Maybe in an amplifier operating near its linearity limits...?

Did you try slight different LO frequencies between TX and RX to understand if the issue is in TX or RX?

I'm not quite sure how making the LOs different would reveal anything. Doing that on the benchtop is easy enough, but when working with real signals and reconstructions, the downconverted signal has to be at the same frequency as the original in order for the thing to actually work.

Did you try to replace these PLL with signal generators?

Again, I'd like to try this, but we don't have such a signal source. One option I could think of it to generate one carrier with a PLL/VCO, and routing its output to both the RX and TX, as opposed to having separate carrier generation on each one. This wouldn't be feasible for actual implementation, but it might yield some clues as to what the problem is.

I would like to give some more help, but it is not easy as you're giving few info about this project (and I understand why).

Thanks for understanding; it's frustrating for us too. But we really do value any advice. At this point the whole thing works so long as we use carriers that are multiples of the reference. This has been made to work well enough. But for the publication we want to be able to give a sound reason for the limitation. At this point I think the best explanation is that there is some leakage between the PLL and VCO, but it seems like it's impossible to verify or falsify this.

 

[tony_lth]

The closest we can do is use the output of our VNA (which goes to 1.5GHz) operating at one frequency, but it can't make a perfectly continuous signal (it can only put out bursts). So we can't use that in an actual experiment with our real setup (which can take minutes).

I always use VNA as signal generator. Set the center freq as you needed, and set span=0Hz, and notice the amplitude of the signal, then you get CW. You can 1st connect the output of VNA to SA to test.

 

[biff44]

You really need to be able to test the input with a known clean source. Your whole problem might only be on broken ground connection somewhere.

Go to ebay and buy a cheap analog tunable oscillator to use as a source. You can probably get one for $100. If you prefer, you can go to digikey and get a 50 mhz oscillator:

478-4792-1-ND

You will need to add a series L and shunt C to lowpass it so it looks ~ like a sine wave, and can run it off two AA batteries.

 

[mtwieg]

I always use VNA as signal generator. Set the center freq as you needed, and set span=0Hz, and notice the amplitude of the signal, then you get CW. You can 1st connect the output of VNA to SA to test.

Right, this is exactly what we try, but it will not really be continuous. It will give a tone for the specified sweep duration (which is always finite, up to a few tens of seconds I think), then it shuts off very briefly and starts again. That's why it's okay for bench measurements, but a real experiment takes minutes, so it's not continuous enough, so to speak. And for real data reconstruction, you really need real signals, not just pure tones, to evaluate performance. Or at least that's what we've found, since this bizarre noise only manifests itself with real signals, not on the bench.

You really need to be able to test the input with a known clean source. Your whole problem might only be on broken ground connection somewhere.

Go to ebay and buy a cheap analog tunable oscillator to use as a source. You can probably get one for $100. If you prefer, you can go to digikey and get a 50 mhz oscillator:

478-4792-1-ND

You will need to add a series L and shunt C to lowpass it so it looks ~ like a sine wave, and can run it off two AA batteries.

Well we have a wavetek 1062 RF synthesizer, but it's not nearly stable enough. We can see it drift and jitter on our SA pretty easily.

 

[tony_lth]

Well we have a wavetek 1062 RF synthesizer, but it's not nearly stable enough. We can see it drift and jitter on our SA pretty easily

What is your SA minimum RBW?
I designed a signal generator, that is also drifting, about 10ppb. I think that's very good.

 

[biff44]

Yeah, that is because the wavetek is a sweeper, not a synthesizer. Seriously, buy a couple of those three dollar 50 mhz crystal oscillators!

 

[mtwieg]

What is your SA minimum RBW?
I designed a signal generator, that is also drifting, about 10ppb. I think that's very good.

Here's a screencap of our SA, fed by the "continuous" 50MHz tone from our VNA:


So the RBW setting goes down to 1Hz, but the VNA output seems to be a bit wider than that. It even drifts by a few Hz if you watch it long enough.

 

[mtwieg]

Yeah, that is because the wavetek is a sweeper, not a synthesizer. Seriously, buy a couple of those three dollar 50 mhz crystal oscillators!

I'm still not seeing what we could do with a perfectly stable signal that we couldn't already do with the VNA output. The "noise" I've been complaining about has only been apparent when using actual signals from real life sources, which have broad bandwidths and large dynamic ranges. And even then we don't see it on a SA, but rather only after reconstructing the sampled output signal.

 

[tony_lth]

Maybe there si some spurs on your sampled clock. Or the de-coupled of the DC supply, or the PCB layout is not good, so generate spurs after sampled.
Do you try to sample without input on the ADC?