Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

PLL Design Steps (25 Points)

Status
Not open for further replies.
Re: PLL Design Steps

master_picengineer said:
Thanks mouzid,
I'll give 25 point for an practical exemple.

Added after 10 minutes:

Dear mouzid, can you tell me how for a X Mhz input and Y Mhz output PLL ?
(obviously Y >X)

Hi, what if Y<X..how do i use a PLL to do that. I need the PLL to design frequencies both lesser and greater than the reference frequency.
 

I posted the frequency synthesizer design course at this link:
#1039631

Very helpful in designing PLLs.
 

esoteric1 said:
I posted the frequency synthesizer design course at this link:
#1039631

Very helpful in designing PLLs.
As far as I know there is a flow to follow and that depend on the kind of PLL you wanna do.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top