romel_emperado
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Any other challenges, up your sleeve?
This forum really a valuable. It's like a classroom, students sharing thoughts, their knowledge and understanding to any topic discussion.
by the way is it possible to do this project using 20mhz crystal? The max clock would be 20/4 =5Mhz right?
I think it would be better if i maximize my clock. Hehe i dont know.
we have now a whole day power interruption here. Huhuhu i cant start working this day. Im on mobile.
nope.Wow, that must be frustrating!
What do you do when the cell
phone battery dies? Can you
charge it in a vehicle?
i dont understand this. I thought we can achieve max clock by using external 48mhz crystal. I cant get exact explaination about that PLL Thing in google how to use that.Actually using a 4MHz crystal the
PLL can generate up to a 48MHz
Fosc,
is that an external clocking circuit? I cant browse properly here in mobile. I will surely search about that soon.
PIC18F2455/2550/4255/4550 devices include a Phase
Locked Loop (PLL) circuit. This is provided specifically
for USB applications with lower speed oscillators and
can also be used as a microcontroller clock source.
PIC18F2455/2550/4255/4550 devices include a Phase
Locked Loop (PLL) circuit. This is provided specifically
for USB applications with lower speed oscillators and
can also be used as a microcontroller clock source.
The PLL is enabled in HSPLL, XTPLL, ECPLL and
ECPIO Oscillator modes. It is designed to produce a
fixed 96 MHz reference clock from a fixed 4 MHz input.
The output can then be divided and used for both the
USB and the microcontroller core clock. Because the
PLL has a fixed frequency input and output, there are
eight prescaling options to match the oscillator input
frequency to the PLL.
There is also a separate postscaler option for deriving
the microcontroller clock from the PLL. This allows the
USB peripheral and microcontroller to use the same
oscillator input and still operate at different clock
speeds. In contrast to the postscaler for XT, HS and EC
modes, the available options are 1/2, 1/3, 1/4 and 1/6
of the PLL output.
The HSPLL, ECPLL and ECPIO modes make use of
the HS mode oscillator for frequencies up to 48 MHz.
The prescaler divides the oscillator input by up to 12 to
produce the 4 MHz drive for the PLL. The XTPLL mode
can only use an input frequency of 4 MHz which drives
the PLL directly.
Hope your power comes back on.
The PLL is enabled in HSPLL, XTPLL, ECPLL and
ECPIO Oscillator modes. It is designed to produce a
fixed 96 MHz reference clock from a fixed 4 MHz input.
The output can then be divided and used for both the
USB and the microcontroller core clock. Because the
PLL has a fixed frequency input and output, there are
eight prescaling options to match the oscillator input
frequency to the PLL.
There is also a separate postscaler option for deriving
the microcontroller clock from the PLL. This allows the
USB peripheral and microcontroller to use the same
oscillator input and still operate at different clock
speeds. In contrast to the postscaler for XT, HS and EC
modes, the available options are 1/2, 1/3, 1/4 and 1/6
of the PLL output.
sad to say Power here just resumed that's why I cant ask google properlyThis clearly tells you of the PLL incorporated in the PIC18F4550.
Read the datasheet carefully and for more information, there's always Google!
96Mhz clock? It's fast than I expected. from the MMC manual I have read that we need to lower the clock up to 400Khz so How do I reach that clock rate if my system is running very fast at 96Mhz? and the available postscaler are 1/2, 1/3, 1/4 and 1/6..I think I cant get lower up to 400Khz in this mode.. not sure just my idea... hehe
During the reset state, the card clock frequency should be between 10–400 KHz. After the reset
state, the maximum clock frequency can be increased to 25 MHz (20 MHz for the MMC).
3.18 Summary
19.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of the SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC7/RX/DT/SDO
• Serial Data In (SDI) – RB0/AN12/INT0/FLT0/SDI/SDA
• Serial Clock (SCK) – RB1/AN10/INT1/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/SS/HLVDIN/C2OUT
Figure 19-1 shows the block diagram of the MSSP
module when operating in SPI mode.
okay I think I got it..Actually the 400kHz you are referring to is the SPI interface clock, not the Fosc or system clock.
Different clock, details of configuring the SPI interface are contained in the section reference above in the datasheet. Basically there nothing to be to concerned about, you can run a 48MHz Fosc and still use the SPI interface if it is properly configured.
SSPM3:SSPM0: Master Synchronous Serial Port Mode Select bits
0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin(3)
0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled(3)
0011 = SPI Master mode, clock = TMR2 output/2(3)
0010 = SPI Master mode, clock = FOSC/64(3)
0001 = SPI Master mode, clock = FOSC/16(3)
0000 = SPI Master mode, clock = FOSC/4(3)
I have lost track of the thread but if i scroll back.... Interfacing SD card is too early for romel... maybe you may have do a ot of basics program and develop sd card once you are familiar with SPI..... Going too fast is also tooo bad... i dont see any point in giving you so many advanced topic source code so soon by other members.....
If you have asked for it .. but i feel a slow approach is always good, and i wonder how some of the experienced people missed to tell you and are helping you....
I am not harsh nor degrade your learning speed.. but learn slowly, as there is no hurry to finish things.......
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