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peak current when i open the switch on LEDs

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Take a look at the last paragraph in my post #13. The reason for the over current when switching on the LEDs, is the no load charge of C4 to peak voltage 300+V. If you load it with a Zener diode(s) that is slightly higher in voltage than the normal loaded LED voltage, you will not have the big current peak when switching the LEDs on. You should select the zener voltage to be some volts more than the normal loaded LED voltage.

The zeners will burn around 4W with the LEDs off, so you should combine a number of zeners in a string that will split the load into small enough chunks of the total power. You must also adjust the value of C2 so the current will be 20mA in both the LEDs and the zeners.
that's good proposal, can you please propose a zener ? i did not find a zener with high voltage,
thanks
 

I did propose a string of zeners, so you need more than one. If you use 1W zeners, I would use them with a large safety margin, say no more than 0,2-0,3 W each, or less.

Let's say you set the zener voltage to 200V @20mA = 4W. 4/0,2=20 zeners, 200V/20 =10V for each zener. Remember to let each zener have some air around it, for cooling.
 

You could just use a current limiter on your switching transistor, as shown below. D5 and V2 on the right mimic your LED string. Q1 is the switching transistor. Q2 and R4 provide current limiting.

On the graph, the red line is without current limiting, the green line is with it.

 

You could just use a current limiter on your switching transistor, as shown below. D5 and V2 on the right mimic your LED string. Q1 is the switching transistor. Q2 and R4 provide current limiting.

On the graph, the red line is without current limiting, the green line is with it.

that's a good proposal Godfreyl, i will implement it in the design,
in the meantime, i changed the position of C4, and it is connected throught LEDs, ( between R4 and the collector on the transistor), and i added a small 100nF/400V between the + and - of the bridge to avoide capacitive coupling between TOP and BOTTOM layer when the transistor is OFF,
 

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