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OPamp Design with National Semiconductor tecnology 180 n

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vdavi81

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Hello . I'm italian student . I'm trying to design an opamp in cadence. I'm working in my university with National Semicondictor tecnology at 180 nanometer..... What Can I set all transistor size.
Now I'm using a circuit for 2 state...the first one is a differential couple of Pmos whit Nmos load. The second is a simple common source amplifier. The BIAS is a simple Current mirror ......

1)I have to define a SR, CMR+,CMR-, offset ecc.. Where can I find the appropriate documentation?
2)Someone has a circuit that running from me? ...or where can I find a good circuit working?

Thanks.
Helllo Davide.
 

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