sounds to me like a design mistake... that violates saftey regulations.and this via is
just 1.2mm
FOR THE TEST maybe you don´t need to connet it to real EARTH GND .. but the high pot test has to be done against your devices´ earth connection.since the actual earth must not be connected for the hipot test.
I assume your sprayed coat does not count at all regarding safety regulations. Similarily: solder stop is not considered any protective isolation at all.i spread some acrylic conformal coat over the via
No.So, the top post continued as follows..
So do you believe that when a hipot test instrument causes flashover, then the actual incidence
of flashover, makes the hipot instrument's voltage suffer high voltage spikes, over and above the
level that was set?...….
To my knowledge, hipot is done both from Primary to Secondary and Primary to PE (at a lower voltage). I think this depends on the particular standard applied though.Thanks, the hipot test we do is from primary (L&N) to secondary outputs, because that is meaningful in terms of its how people could get shocked in the actual product.
You get flashover between primary, secondary, and PE? That makes no sense.and so when the hipot voltage is applied, we get flashover from pri to sec, obviously by way of this via flashing to earth , and then this same earthed enclosure flashing to primary.
Thanks, the pri to sec distance is 6mm all over the board...so no flahsover there...but....a sec via is 1.2mm from the earthed enclosure...and also, many pri tracks are just 3mm away from the (same) earthed enclosure........so in these cases, we only actualy have 4.2mm of clearance pri to sec.....which means its flashing over from pri to sec, but via the earthed enclosure.You get flashover between primary, secondary, and PE? That makes no sense.
Thanks, but sorry that doesnt work here as the clearance distance is still the same1. Put a cutout in the board between the via and PE
Can you tell which test specification requires/describes this setup?As is well known, when you hipot test from L&N to output, one
must have the earthed enclosure floating (not connected to earth).
Thanks, its because in a real installation, Earth may mistakenly not get connected up...also, in chalk or clay areas, the Earth ground doesnt provide a proper low Z "earth" connection. As such, all test specs , in all the standards, require earth to float during hipot test.Can you tell which test specification requires/describes this setup?
Version 4
SHEET 1 2216 1616
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WIRE 480 1296 -3280 1296
FLAG -1104 736 0
FLAG -304 576 0
FLAG -272 752 SecGND
SYMBOL voltage -3280 704 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.04
SYMATTR InstName V1
SYMATTR Value SINE(0 5656 50)
SYMBOL diode -1584 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MUR460
SYMBOL diode -1584 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value MUR460
SYMBOL diode -1344 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value MUR460
SYMBOL diode -1344 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value MUR460
SYMBOL res -2624 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R23
SYMATTR Value 1
SYMBOL cap -2064 96 R0
SYMATTR InstName C15
SYMATTR Value 1n5
SYMATTR SpiceLine Rser=0.03
SYMBOL cap -1840 128 R0
SYMATTR InstName C12
SYMATTR Value 100n
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -1280 240 R0
SYMATTR InstName C3
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=0.05
SYMBOL ind2 -864 -80 R0
SYMATTR InstName L1
SYMATTR Value 1.06m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL ind2 -464 48 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 54µ
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL diode -352 -464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value VS-E5TH1506
SYMBOL cap -160 144 R0
SYMATTR InstName C1
SYMATTR Value 1m
SYMATTR SpiceLine Rser=0.1
SYMBOL res -416 560 R0
SYMATTR InstName R1
SYMATTR Value 100e9
SYMBOL cap -688 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10p
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -704 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 10p
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -1936 608 R0
SYMATTR InstName C9
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SYMATTR SpiceLine Rser=0.03
SYMBOL res -2608 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL cap -672 -400 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMATTR SpiceLine Rser=0.03
TEXT -1104 1240 Left 2 !.tran 0 2 0 startup
TEXT -2880 -144 Left 4 ;Line
TEXT -2880 480 Left 4 ;Neutral
TEXT -2272 992 Left 4 ;Earth (chassis)
TEXT -1000 -296 Left 4 ;Flyback\nTransformer
TEXT -1192 576 Left 4 ;Primary\nside
TEXT -112 568 Left 4 ;Secondary\nside
TEXT -456 -200 Left 5 !K L1 L2 1
TEXT -2304 88 Left 4 ;Y2 capacitor
TEXT -1904 568 Left 4 ;Y2 capacitor
TEXT -3576 752 Left 5 ;Hipot\nTester\n4kV RMS
TEXT -768 -88 Left 3 ;Stray
TEXT -760 248 Left 3 ;Stray
TEXT -728 -432 Left 4 ;Y1 Capacitor
TEXT -1816 -688 Left 6 ;Isolated offline flyback
TEXT -760 1056 Left 6 ;Earthed Enclosure
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LINE Normal -1808 1152 -1712 1152 2
LINE Normal -1616 1152 -1808 1152 2
LINE Normal -1616 1152 -1616 1152 2
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LINE Normal -1744 1184 -1728 1152 2
LINE Normal -1712 1184 -1696 1152 2
LINE Normal -1680 1184 -1664 1152 2
LINE Normal -1648 1184 -1632 1152 2
RECTANGLE Normal 208 1104 -2944 -640 2
Version 4
SHEET 1 2216 1616
WIRE -1264 -496 -1488 -496
WIRE -848 -496 -1264 -496
WIRE -352 -480 -480 -480
WIRE -144 -480 -288 -480
WIRE 128 -480 -144 -480
WIRE -848 -160 -848 -496
WIRE -768 -160 -848 -160
WIRE -480 -160 -480 -480
WIRE -480 -160 -704 -160
WIRE -2720 -112 -2880 -112
WIRE -1824 -112 -2640 -112
WIRE -1712 -112 -1824 -112
WIRE -1488 -112 -1488 -496
WIRE -1488 -112 -1600 -112
WIRE -1360 -112 -1488 -112
WIRE -848 -64 -848 -160
WIRE -480 -48 -480 -160
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WIRE 480 -32 128 -32
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WIRE -1360 -16 -1360 -112
WIRE -1712 112 -1712 -112
WIRE -1600 112 -1600 48
WIRE -1600 112 -1712 112
WIRE -1824 128 -1824 -112
WIRE -2880 144 -2880 -112
WIRE -2880 144 -3280 144
WIRE -144 144 -144 -480
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WIRE -752 176 -848 176
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WIRE -480 176 -688 176
WIRE -1360 192 -1360 48
WIRE -1360 192 -1712 192
WIRE -1264 240 -1264 -496
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WIRE -1360 272 -1360 192
WIRE -1600 416 -1600 336
WIRE -1488 416 -1600 416
WIRE -1360 416 -1360 336
WIRE -1360 416 -1488 416
WIRE -2880 448 -2880 144
WIRE -2704 448 -2880 448
WIRE -1824 448 -1824 192
WIRE -1824 448 -2624 448
WIRE -1712 448 -1712 192
WIRE -1712 448 -1824 448
WIRE -304 512 -400 512
WIRE -400 576 -400 512
WIRE -304 576 -304 512
WIRE -1488 704 -1488 416
WIRE -1264 704 -1264 304
WIRE -1264 704 -1488 704
WIRE -1232 704 -1264 704
WIRE -1104 704 -1232 704
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WIRE -400 704 -400 656
WIRE -400 704 -480 704
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WIRE -144 704 -400 704
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WIRE -1104 736 -1104 704
WIRE -32 752 -32 704
WIRE -32 752 -272 752
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WIRE -1232 880 -1232 704
WIRE -1232 1008 -1232 944
WIRE -928 1008 -1232 1008
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WIRE -640 1008 -928 1008
WIRE -928 1104 -928 1008
WIRE -3280 1296 -3280 800
WIRE 480 1296 480 -32
WIRE 480 1296 -3280 1296
FLAG -1104 736 0
FLAG -304 576 0
FLAG -272 752 SecGND
SYMBOL voltage -3280 704 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.04
SYMATTR InstName V1
SYMATTR Value SINE(0 5656 50)
SYMBOL diode -1584 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MUR460
SYMBOL diode -1584 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value MUR460
SYMBOL diode -1344 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value MUR460
SYMBOL diode -1344 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value MUR460
SYMBOL res -2624 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R23
SYMATTR Value 1
SYMBOL cap -1248 880 R0
SYMATTR InstName C15
SYMATTR Value 1n5
SYMATTR SpiceLine Rser=0.03
SYMBOL cap -1840 128 R0
SYMATTR InstName C12
SYMATTR Value 100n
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -1280 240 R0
SYMATTR InstName C3
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=0.05
SYMBOL ind2 -864 -80 R0
SYMATTR InstName L1
SYMATTR Value 1.06m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL ind2 -464 48 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 54µ
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL diode -352 -464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value VS-E5TH1506
SYMBOL cap -160 144 R0
SYMATTR InstName C1
SYMATTR Value 1m
SYMATTR SpiceLine Rser=0.1
SYMBOL res -416 560 R0
SYMATTR InstName R1
SYMATTR Value 100e9
SYMBOL cap -688 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10p
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -704 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 10p
SYMATTR SpiceLine Rser=0.01
SYMBOL cap -656 864 R0
SYMATTR InstName C9
SYMATTR Value 1n5
SYMATTR SpiceLine Rser=0.03
SYMBOL res -2608 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
TEXT -1192 1368 Left 2 !.tran 0 2 0 startup
TEXT -2880 -144 Left 4 ;Line
TEXT -2880 480 Left 4 ;Neutral
TEXT -1048 976 Left 4 ;Earth (chassis)
TEXT -1000 -296 Left 4 ;Flyback\nTransformer
TEXT -1192 576 Left 4 ;Primary\nside
TEXT -112 568 Left 4 ;Secondary\nside
TEXT -456 -200 Left 5 !K L1 L2 1
TEXT -1488 872 Left 4 ;Y2 capacitor
TEXT -624 824 Left 4 ;Y2 capacitor
TEXT -3576 752 Left 5 ;Hipot\nTester\n4kV RMS
TEXT -768 -88 Left 3 ;Stray
TEXT -760 248 Left 3 ;Stray
TEXT -1816 -688 Left 6 ;Isolated offline flyback
TEXT -480 1056 Left 6 ;Earthed Enclosure
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LINE Normal -1808 1152 -1712 1152 2
LINE Normal -1616 1152 -1808 1152 2
LINE Normal -1616 1152 -1616 1152 2
LINE Normal -1808 1184 -1792 1152 2
LINE Normal -1776 1184 -1760 1152 2
LINE Normal -1744 1184 -1728 1152 2
LINE Normal -1712 1184 -1696 1152 2
LINE Normal -1680 1184 -1664 1152 2
LINE Normal -1648 1184 -1632 1152 2
RECTANGLE Normal 208 1104 -2944 -640 2
I see things differently.Please may i ask this related qu on Y caps....
Hi, we have 2 Y caps in our offline isolated SMPS with earthed enclosure, both 1n5,
but one is Y1 (DK1E3EA102M86HAH01, 8th page) and the other is Y2 (DE2E3KY152, 42nd page)
Y caps
We need them to be the same capacitance right up to 5600V, since we are 4kV flash testing, and of course,
they form a capacitive divider centred on the earthed enclosure, so we need to know they are same capacitance
whatever the voltage. But the datasheet doesn't say. Do you know?
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