need help with designing QPSK modulator/demodulator

[jhonny_yang]

useful. 8)
If you are interested how @ltera does this:

@ltera QPSK Modem Referance Design

an281.pdf

No need point if download from here

**broken link removed**

 

[neocool]

Unfortunately, they use prebuild cores. Even though Xilinx has all the required blocks, I don't have the luxury of using CoreGen. So, I have to write my own VHDL code.

 

[jhonny_yang]

Unfortunately, they use prebuild cores. Even though Xilinx has all the required blocks, I don't have the luxury of using CoreGen. So, I have to write my own VHDL code.

price is time & complexity... if you are student , hobbiest or academic man you not need buy the coregen but if you are profesional or indrustry but it a good solution minimal the risk , and other bla..bla..bla

 

[udofun]

I see.
I am just trying to find out how to make modulator/demodulator correctly and I'm looking now at different mod/demod projects. I still try to understand several things.

Now I work with a modulator as a ready device. It has two I and Q inputs.
(BB_I+ BB_I- BB_Q+ BB_Q-, the levels of this inputs ara: min 1.5 norm 2 max 4 V)
I didn't find any description how should I encode my sigle I (or Q) bit stream into 2 inputs BB_I+ and BB_I-.
There are several possible variations.
How should I do this correctly?

 

[paviljonac]

hi

please look at this. this is v22_bis old simple qam modem design. it has all the basics you need to enter the field of modem design:

1. polyphase shaping filter with upsampling
2. mixer
3. another upsampling

4. dac/adc + channel effects emulation

5. AGC with hilbert transform anvelope detection and log-exp loop
6. signal presence detection
7. maximum likelihood polyphase timing recovery loop with mathced/diferential matched structure to determine timing error
8. digital costas loop for phase/carrier recovery
9. fractional spaced LMS equalizer
10. relative QAM mapping/demapping

this code gives you "block" diagram of modern all-digital single carrier modem.

visit:

www.signumconcepts.com

for software defined radio papers from prof. fred j. harris, legend of comms.

cya.

 

[udofun]

thanks a lot,
I'm still studying in modem design.
there are a lot of interesting at www.signumconcepts.com
I'll try MATLAB files soon.

 

[Mazi3]

both will do with cordic. quite simple stuff if you don't have to make carrier correction. that mean, that phases are constant

 

[neocool]

Alright,
1. QAM requires 3 different amplitudes and 3x4 different angles.
Last one can be done using DDS shifting register, I can understand that. However, 3 different magnitudes that are required for QAM, are not multiples of 2, but rather division by 3 or something! So, if you want to use one LUT, division by non-2 multiple is needed.
How can I solve this? Will CORDIC help me in this case?

2. Does QAM require only one channel (i.e. In-phase), rather than 2 as in QPSK?

Reason for asking: In QPSK there are 2 bits per symbol and there's a serial to parallel conversion on input bitstream, so that even bits go to I channel (cosine wave), while odd bits go to Q channel (sinewave). On the other hand, how would you split between channels 4 bits per symbol used with QAM?

Thank you

 

[Mazi3]

if you want to calculate sine/cosine with cordic, it requires a "real vector", that mean, that you have to first put x=1;y=0; and then iterate to desired angle.
but cordic has some gain (1.6...) soo, instead one, you have to put x=1/1.6... at first iteration. only in thos way, result will be x^2+y^2=1 if you need different amplitude at the exit, you simply change first value of iteretion.

for your second question, you simply add I and Q chanel to transmit it through the wire

I hope, it will help.

for demodulation, you can also use cordic in opposite manner

 

[neocool]

I'll take a closer look at CORDIC.

as about my second question, I was asking if I should be making serial to parallel (1rawdata stream to 2 channels) conversion when implementing QAM.

For BPSK, only I is used using cosine.
For QPSK, we need I and Q channels.
For QAM, you need vector in complex plane, but how to represent vectors pointing to 4-bit numbers? I'll need to interface it to upconverter that has I and Q channel inputs to be able to observe the signal, but can only think of the way to output complete QAM signal to one channel only.

 

[neocool]

if you want to calculate sine/cosine with cordic, it requires a "real vector", that mean, that you have to first put x=1;y=0; and then iterate to desired angle.
but cordic has some gain (1.6...) soo, instead one, you have to put x=1/1.6... at first iteration. only in thos way, result will be x^2+y^2=1 if you need different amplitude at the exit, you simply change first value of iteretion.

I've looked at cordic implementation found on Opencores.org and have several questions.
You have mentioned that to get different magnitude, you have to let x0=1/1.6...

I got a little confused about that. It looks like initial value is assigned to K=0.6077253 to avoid multiplying answer by K every iteration. So, x0=K=0.607... (for x0=1 originally). So, if you want 1/sqrt(3) as maximum value of your sinewave, x0 should become K*1/sqrt(3), right?
And represent it all in 16 bits, the result above is multiplied by 2^15, correct?

Also, I assume you can generate sinewaves of different magnitudes, as long as 1/sqrt(number) does not exceed 1.

Let me know I there's something incorrect in what I've said above.

 

[neocool]

I guess I have too many questions. Here is another one.
Thinking about demodulation, a lot of papers refer to squaring incoming signal in order to recover the carrier (2*fc). That makes sence, I've verified it as well. Next step except filtering would be to detect zero crossings "by looking at the sign of the squared signal". But how would you get the sign if the signal is positive after squaring.

QUESTION: How should I go around it?

So far I've tried to detect the first zero value and since the recovered carrier is doubled, I can create a square wave, starting from -1 at first zero crossing. However, I don't think this would be too reliable.

Thanks in advance

 

[eziggurat]

I have some code that I've downloaded a while back.

 

[neocool]

Thanks
I think the first one is by Russel Kliese from Queensland. I saw it in one of the papers.


Thanks for the files

 

[lbk1407]

im new to verilog, but i was given a project trying to design a QPSK modulator from front to back end design. I found some codes from website, but it is without test bench. is it possible for anyone to help me write out the test bench? as we are really lack of time, as we are just given a month time to complete the whole project. please send to lbk1407@yahoo.com
thankz.

 

[TTW]

Neocool, can you help me to find the paper about Russell Kliese, Queensland
You say you had saw the source code of the PSK post by eziggurat right ?

I am in the process of learning how to design a modem with hdl code.

I download the code post by eziggurat but i am not very sure that what kind of PSK modulation was use by the author ..

Thanks and regards ...

TTW

 

[chenshaokuan]

i have read all your discuss.thanks a lot ,it is very helpful, especially i download some codes about psk, oh, i appreciate them................

Added after 6 minutes:

i have read all your discusss,it is helpful,i ever had some of the questions,i dont know how to find solution, ..............you bring me some spirits,some ways to my problem,especielly after i downoaded some codes,................

 

[liurong82]

Thanks very much for all the formers！

Added after 2 minutes:

The information is very useful for me to learn something about modulation and demodulation！thanks！！

 

[shankarmit]

A lot of matlab simulation must be done before going into VHDL..

the values of loop filter must be calculated from matlab simulation...

Just refer to this ieee paper you will get more information..

performance analysis of ALL Digital BPSK Spreaded signal..
search in scholar.google.com
it will be really useful as bpsk is asubset of qpsk...


Regards
Shankar
Tallika

 

[hrhgroup]

Dear lbk140700
I try 3times to download the report by i couldnt, can you upload to again or send it to me: hrhgroup@gmail.com
Thanks