[Moved]: how to calculate the gate resistance of Igbt (fg25n120) /Mosfet

[mobinmk]

You can not pull the 6N137 output higher than 7V. It's the collector of the output transistor (the emitter being connected to ground) so it would be destroyed (Vce max = 7V).

thanks sir

can i connect the pull up resistor to vcc(output of 7805) of 6n137

 

[red_alert]

Yes, but you still need to connect the Vdd of the driver to 5V, too.

 

[mobinmk]

Yes, but you still need to connect the Vdd of the driver to 5V, too.

Sir please check the final schematic which is uploaded.
View attachment driver mobbbb.bmp
100 nF and 100uF capacitors are connected across Vdd and Vss....
Should i SHORT vSS AND COM

 

[red_alert]

Should i SHORT vSS AND COM?

Vss should be connected to 7805 ground (that's the only condition). Usually, that ground is connected to the main schematic ground (along with the COM).

You could short them at the driver level but you don't have to share the low current path (from 7805 to Vss) with the high current one (from COM to IGBT emitters or from COM to main circuit ground).

There was a mistake in your previous PCB: the 6N137 ground pins were floating (they were just connected to decoupling capacitors but there was no connection to the 7805 ground).

- - - Updated - - -

They are floating in your current schematic, too. Also, don't forget to reduce the 6N137 pull-up resistors to 360ohm (being connected to 5V now).

 

[mobinmk]

Thnks sir,

i take the final print out of schematic, and ready to etch the board,

i got your valuable reply..

i didnt noticed the mistake,

There was a mistake in your previous PCB: the 6N137 ground pins were floating (they were just connected to decoupling capacitors but there was no connection to the 7805 ground).

thnkzzz Red_alert..

i appreciate your keen observation, find mistakes,,

i wish to you a wonderful future,may god bless you,

now, feeling proud to get a master like u as my guide.

pls check the last and final schematic
View attachment driverckt.BMP

any mistake ???

should i connect 100uf eletrolytic, 100nf ceramic capacitor across Vdd and Vss ??

regards

mobin

 

[red_alert]

You're welcome, thanks for your kind appreciations.

Now.. the mistakes. You have to connect to 5V just the Vdd pin! The Vc should remain connected to 15V. That's the supply voltage to drive IGBT gates, to charge the bootstrap capacitor and to bias the whole IC. Just remember: Vdd only adjusts the input thresholds (accomodate the circuit inputs to uC logic levels).

And don't forget to change the bootstrap diode to UF4007.

 

[mobinmk]

Thnks Sir,

should i use 400nf, decoupling capactior across VCC and COM, VB AND vs, and VDD and VSS ??

pls recommend the capacitor value across Vdd and VSS??

100 uf electroltic is enough??

 

[red_alert]

You could connect the pull-up resistors of 6N137 across pin 6 (OUT) and pin 8 (Vc) directly, you don't need a separate path toward 7805.

To answer your previous question: you need decoupling capacitors for VDD, VC and VB (FAN7392) and for Vc (6N137).

VDD is a low current pin, a 10uF/0.1uF pair should be enough.

 

[mobinmk]

Should i reduce the gate resistor frm 22 ohm to 10 ohm??
i think Ton,Toff time will decrease, but dv/dt will increase

any other problem??