Looking for reference on verilog-A

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flushrat

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How to study verilog-A

I am a beginer on verilog-A. I want to write some behavior model for analog modules, such as sample/hold A/D D/A etc. Plz suggest me some good reference.
 

Re: How to study verilog-A

design a system use it so you can do more
 

How to study verilog-A

check this site:

**broken link removed**
 

Re: How to study verilog-A

The easiest way I found is to create simple system and then create block in VA.
Big help (to me) are the verilog models provided by cadence. I usualy take those , disect them and make my own stuff.
 

Re: How to study verilog-A

I think case study is helpful , I once saw a case study provided by cadence named "Top Down Modeling and Test Bench Development Verification Case Study: Pipeline ADC" ,it is quite good
 

How to study verilog-A

I think you can begin from some simple circuits before writting the A/D.
 

Re: How to study verilog-A

i think you can read veriloga manual provided by candence
 

Re: How to study verilog-A

there is a book by ken kundert called "The designer's guide to Verilog-AMS" it's a very nice one for beginners
 

How to study verilog-A

Is the Verilog-AMS the same with the Verilog-A?
 

Re: How to study verilog-A

siboy said:
Is the Verilog-AMS the same with the Verilog-A?
Click to expand...

Verilog-AMS is the integration of Verilog and Verilog-A
 

Re: How to study verilog-A

read cadence user guide for verilog-A, it is very descriptive
 

How to study verilog-A

i used it before. actually you can just copy its existing library cells and modify it to what you need. like simple c program
 

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