Is Analog Circuit Design Dead ?

[Puppet1]

is analog rf going away

Any thoughts on this ?

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Analog experts eye Moore's Law

SAN DIEGO — A panel of analog and process experts looked at the challenges posed by Moore's Law and concluded that something's got to give.

Charlie Sodini of Massachusetts Institute of Technology opened the Design Automation Conference panel here by sketching a grim picture. Arguing for separate and unequal treatment, Sodini said "Integration isn't always the answer. We can't keep using silicon as a packaging technology."

Sodini added that lower supply voltages mandated by fine process geometries put pressure on signal-to-noise ratios. Circuit designers responded by increasing the power of circuits, thus undoing the advantages of scaling. In addition, he said, engineering of the gate dielectric materials is creating more trap sites, driving up both 1/f and white noise.

Moreover, he said, leakage was limiting resolution, especially that of discrete-time circuits, which are based on the assumption that it is possible to store charge efficiently. "Running the circuit faster helps, but again that drives up power," he said. "We are watching 20 years of charge-storage circuit design technology leak away."

IBM's Tony Bonaccio didn't dispute the problems. In "designing chips for mass storage and then selling maybe 30 million of one part, we have to face the fact that in the market, integration always wins," Bonaccio said. "But we can't keep up with Moore's Law by scaling — our designs don't scale. We have to keep up by innovation."

Bonaccio said that means aggressively moving functions from analog to digital. "That's what we will have to do in the future," Bonaccio concluded. "Minimize the number of analog components, and use the relatively free digital stuff to fix it up — autocalibration, analog built-in self test."

Ernesto Perea of ST Microelectronics research laboratories, said he is pessimistic about the future, adding that the passive components that set the minimum size of an analog block do not scale. Hence integrated analog necessarily becomes more expensive as geometries decline. "In the long run, it becomes impossible," Perea said.

Bob Pitts, Texas Instruments' 90-nm platform manager, joined Bonaccio in the positive camp. "At TI, analog and RF circuits are shrinking in area right along with digital," Pitts said. "That isn't scaling. It's architectural innovation, done from the system level down."

Pitts described partitioning decisions by system designers, novel circuits and process adders by the foundry engineers working together to reach objectives like so-called single-chip cellphones. He said TI's architectural arsenal has been expanded to work around them.

TI'has shifted to controlling and calibrating analog circuits with a dedicated ARM processor, he said. The approach was recently upgraded to a proprietary 64-bit RISC core that actively adjusts the linearity of RF circuits. TI has also developed on-chip, low-drop-out (LDO) regulators for precision voltage supply, and is moving to an LDO-per-block architecture for critical RF and mixed-signal functions.

On the process side, Pitts said many devices required by analog designers could be made with no additional masks. "Virtually free is a necessity at our volumes," he said.

Added Stanford University professor Theresa Meng: "We are using logic circuits to calibrate and correct analog circuits. But with digital circuitry being so much smaller and using one twentieth the power, tomorrow we will be asking ourselves just how many analog transistors we need to keep at all."

"We have to challenge traditional design," Meng added. "We can do self-calibrating circuits that continuously correct distortion. This takes new topologies and new digital algorithms for statistical signal processing. But it is the future of analog."

 

[flatulent]

ic design is dead

Something is wrong with the discussion. There is no need to continually reduce the size of analog silicon. It is not like memory which grows exponentially in capacity. You do not find an exponential growth with time in the number of IF amplifier stages in a receiver.

I am sure the confident panel members that talk about successfully correcting for distortion have never designed a RF power amplifier for multicarrier systems.

All of the panel members get paid to change (not necessarily improve) things. If they claimed that their work was finished they would get sacked. In order to get more pay they have to invent new pots of gold at the end of rainbows to chase with the assistance of a big department they manage with high managers' salaries.

 

[terryssw]

analog circuit design for adding signals

Actually the feature size of analog transistors are really needed to be scaled down due to the pressure imposed by digital circuits and also the most important SoC issues.

Also, the scaling of technology is not only due to the exponential increasing scale of digital circuits, but also (probably the most important) the requirement of obtained faster digital circuits, since the minimum feature size put the limit on the parasitic capacitor load that the digital gate is required to drive. (e.g. CPU that built from 90 nm technology is always faster than that from 350 nm technology). Why the speed of digital circuits required continuing increase? Also due to the greedy of the customers, they want high speed computers. (This is also why engineers and researchers get paid)

Thus, the downscaling of digital circuits put continuing pressure on analog circuits, especially the hit topic System on Chip (e.g., consider how do you can do a "Single-Chip CMOS Recevier" that only have one chip to performs all the functions started from antenna and LNA front-end down to ADC and DSP back-end).

Also, of course it is highly highly recommended that most of the function performed in digital domain, because of the power of digital circuits. But can we completely remove analog part? NO! Because all the things that humans want to manipulated is analog signals! Consider you want to do a purely digital GSM receiver that process 900MHz signals captured by antenna, so that all the down-conversion, mixer, etc. are all done in digital domain. Great idea, right? but how can you have a digital signal with 900 MHz equivalents code stream? How do you design an extremely high-speed ADC (sampling rate > 1.8 GHz) ? Very Very difficult (especially in CMOS, no CMOS ADC with fs > 400MHz with >10 bit nowadays, while the CPU can already exceeds 3GHz!) This is also the reason why the salaries of analog designers (actually some kind of researchers) are much higher than the digital designers (actually are programmers).

 

[Puppet1]

analog design + things to do for new technology

Personally I think this is the age old argument:

DSP and Digital Circuitry wil replace all the analog cicuits and replace them, because computer do things faster and better....

While I know that shrinking voltages makes analog circuits worse, DSPs are trying to get faster while only analog circuits can do serious signal processing at high frequencies.

so analog still has life in it.

 

[bastos4321]

tony bonaccio

Do not forget that the world is analog and there are allways the need to make the conversion from analog to digital and digital to analog. In the last this is the last frontier that digital processing cant reach, and when resolution and frequency increase the analog stuff gets much more complicated. The analog will not die as long there is the need to comunicate between the two worlds.

Bastos

 

[goodboy_pl]

is analog technology dead

according to AMD and Intel reports MOS technology scaling can be continued until 2010-2012; of course it is for digital chips and for analog it seems to be occured sooner due to lower SNR or dynamic range.

also as bastos4321 said "The analog will not die as long there is the need to comunicate between the two worlds." and we must remember that standard cell used in automatic place and route are designed/optimized like analog cells.

BTW, current analog designs can not use all speed benefit of the advanced technologies due to other restrictions.

Thus i think, analog ic design can not be considered dead in near future!

BEST!

 

[rfsystem]

massachusetts institute analog design

Analog is more than considered!

As digital processing of analog signals got cheaper more analog talent went into the DSP domain. Because digital is an implementation technique. But the knowlege is preserved by using signal flow descriptions of DSP programms
instead of multipages schematics. Sometimes analog processing is described as system design. Because of the physical interfaces of systems analog processing is a must. The implementation could be either charge, current, voltage, (flux, superconducting), fixpoint or floatingpoint and all mixtures of that. Only with the knowledge of all implemenation domains and there physical realisation properties in silicon a sucessfull SOC could be designed.

 

[tok47]

future of analog circuit design

recently, I just read an article. The article sound like that, some researcher trying to replce the photo resist by using PMMA (kind of polymer). So that, the chip size can reduce when compare with chip that produce by using photo resist.

 

[playdc2002]

us analog circuit design salary

actually, it is easier to find a job for analog engineer than digital counterpart.

 

[dumbfrog]

analog ic design dead

A/D and I/O
don't tell me that they are all digital

 

[bimbla]

analog circuit sure are fine

In power Elns. the o/p stage will always be ANALOG!!!!

Good sounding audio will always be analog.

bimbla.

 

[hoangthanhtung]

Analog design is more difficult than digital design but it can reach optimize performance, high speed and trust qualty, expecialy in audio process... Now, most ofl audio analog amplifier is more expensive than digital amplifier. Bye

 

[uncle_urfi]

Long live analog design. but the rant first!!

The issues with 90nm get amplified further when you go to 65nm. Experts believe that things would come to a technological deadend when we reach 35nm since we would be talking about depositing upto 2 layers of atoms in some places on the wafer. The problems of leakage and breakdown would also be amplified further. Although, it is being done in the lab, but companies are not yet convinced of its true marketability. The potential cannot be denied, once and if the issues were ironed out.

One should not fail to notice that during the past 1.5 years, the frequency of the Intel / AMD processors is stuck around the 3.2 GHz mark and more architectural innovation is being made (e.g. FSB frequency increase, 64 bit architectures, QDR RAM, 8x agp, newer bus standards, more cache etc) instead of a just a 2x frequency multiplication every year. (Explain this to a 60 year old greedy CEO with a degree in MBA ).

The transit time of the transistor is no longer the issue. 90nm is fine. It is the interconnect capacitance that is the bottleneck and it is not going anywhere. With 90nm, the sidewall capacitance is more than twice of the layer-to-layer capacitance while place-and-route is performed and the problem is a real one that demands more power to charge the capacitors up. Hence you can see why the speed of the processors is not increasing.

The tools are lagging behind (technology changes every two years but the tools require upto 3 years to catch up), since this nanometer design requires co-design tools that allow the designers to see the parasitics picture at the end of each day, not at the end of several weeks. Hence the development cost is going up and it is not going (all of it) in the productive direction. 90nm remains a challenge as far as manufacturability of the circuits is concerned.

Now it seems that innovation at the architectural level is reaching its dead end too and hence there is panic in the boardrooms. Tell that to the 60 year old crook (CEO) with a degree in finance.

I personally think that the next wave of computers would be optical computers, that would consume much more power, but will keep the consumer treadmill running for another 20 years, giving the customers a 2x increase every year. (when in fact a 20x increase would be trivial to achieve). As a reference, SATA can easily achieve 1.2 Gbps and much much more with the currently available technology, but you will see nothing more than 150Mbps for your hard drive for the next 2 years. Remember the 2x/year treadmill.
The 60 year old crook and his cronies are happy again. picture that!

Active work is being done on optical technology since it would remove the interconnect capacitance issue, but requires a total architectural redesign of the processors/chips (not an easy job). Lot of microwave/ EM/Analog design opportunities.

Another front is the development of biological technology, on which i am no expert. The dilemma though is obvious. These processor/eda giants have little or no experienced workers in the biotech field or any such experience. And the biotech industry speaks another lingo, with no electronics experience. It would be a while before mergers take place and we see some tiny biological computers. (20 years away commercially)
Now tell that to the snake(CEO) and his boardroom parasites.

After 20 years, eliminating computer viruses would require that you spray something on the computer and while you are at it, you can also spray the CEO and his parasites.

Lots of fun times ahead and ANALOG design will survive. We were hearing this digital crap 20 years ago, and we will keep hearing it. For the business-degree-holder-dumb cronies, it is easier to spot the long islands of analog stuff on an incomprehensible and a wasteful automatically generated digital chip. In the end, they will simply get used to it.
Ciao.

 

[Puppet1]

all of it is going to converge to:

analog/rf/microwave/millimeter wave.

they are working on 40GB/s and 80+Gb/s wireline stuff now, and 100-200GHz logic makes an appearance at the new GaAs IC Symposium www.gaasic.org.

So, if we can mass market millimeter wave things, that can be a new market. People are already working on 65GHz WLAN, as if the current wireless LAN is doing so well !

I think CMOS can push it, 40GB/s at 90nm but after that forget.

The pedulum will swing back to bipolar since CMOS will be so expensive.

InP HBT !

 

[flatulent]

There are many hidden factors involved. (In the avation field the fastest airliner has been scrapped because after 30+ years it has proven to not be economical. How many people 50 years ago would have predicted a continual unlimited increase in the size and speed of passenger aircraft?)

I suspect that after a while the quantum mechanical factors will become inportant and many unknown conditions will put a stop to the continual increase of speed and decline of power drawn. Try imagining to define BJT beta when the base is so small that it contains only one free charge carrier.

 

[rfsystem]

There are some hidden projects working on complementary bipolar for logic. The reason is that bipolar, or diffusion based charge flow control, have much higher ratio between off and on. That could be the ultimative number for coming process generations.

 

[Puppet1]

Aren't they far from shrinking the bipolar base that far ?

I have seen almost 1 TERAHERTZ cut off frequencies for InP HBT's...

What do people think -- will this millimeter wave market ever take off ?

This will destroy a lot of engineers -- basically everyone will have to re learn MMIC, RFIC and a lot of microwave engineering to crank out things that high, not to mention become physicists..

40-120GB/s wireline and 65 GHz WLAN ... Who would have thought

 

[omsi]

Analog is forever.
as u know moore'slaw is running slow now.
analog design proofs itself that the designs in the real world is analog

 

[jinxingsun]

Haven't you read the chaper one of Razavi's book?!

 

[piao]

Analog will exist forever!

when the digital design is working at high speed, the EDA tool can not help them solve the problems but the experience from analog design. and later the EDA tools will use these kinds of experience to improve their APR tool.