wolve4
Newbie level 2
I am given a scan stitched gate level netlist (180 nm ) , and a scan sdc, funcional sdc (apart from this no other information is given )and a library file. I was asked to check the correctness of the scan chain in the netlist and redump the netlist and scan def. The Design has a TMX module wich generates all the scan signals (even the scanin data signal is generated by the TMX module....the design has no compression ) . The problems I am facing are
1)The scan mode is an internally generated signal. The case analysis for the scan mode is given in SDC but I didin't find a command which helps me constrain the internal instance which generates the scan mode signal in DFT advisor manual.
2)To use the add_scan_chains command the scanin and scanout pins should be a primary input/output. But in the netlist the scanin pin is a instance output pin present in the TMX module. So I am unable to add the existing scan chains in the design.
3)The same netlist is ported to 45nm using a 45nm library. so obviously the chain will be broken as the insatnce and insatnce-pin name differs in 45nm libs. So how can we do scan insertion for the 45 nm netlist (which already has scan flops ).
I would be pleased , if I get a flow of how we can read in the scan information of prescan inserted netlist in DFT ADVISOR with the above given infomation adn dump out a log file.
I would also like to know "Can we delete the scan information ( LIke the scan pins, stitched scan chain etc ) and re insert scan if we have only the above given (mentioned i the first line) information.
Thanks in advance
1)The scan mode is an internally generated signal. The case analysis for the scan mode is given in SDC but I didin't find a command which helps me constrain the internal instance which generates the scan mode signal in DFT advisor manual.
2)To use the add_scan_chains command the scanin and scanout pins should be a primary input/output. But in the netlist the scanin pin is a instance output pin present in the TMX module. So I am unable to add the existing scan chains in the design.
3)The same netlist is ported to 45nm using a 45nm library. so obviously the chain will be broken as the insatnce and insatnce-pin name differs in 45nm libs. So how can we do scan insertion for the 45 nm netlist (which already has scan flops ).
I would be pleased , if I get a flow of how we can read in the scan information of prescan inserted netlist in DFT ADVISOR with the above given infomation adn dump out a log file.
I would also like to know "Can we delete the scan information ( LIke the scan pins, stitched scan chain etc ) and re insert scan if we have only the above given (mentioned i the first line) information.
Thanks in advance