Here the method I use:
- Put the switch ON (NMOS gate =VDD, PMOS gate=0)
- Place 2 voltage sources at each end of the switch, one with value V, the other with V+0.1~V+0.3
___
__V__| |__V+0.1__
- Do a sweep on V
- Plot the current, and you get the resistance by 0.1~0.3/I.
Remark: 0.1~0.3 it will be the voltage drop at your switch. The lower the best.
PMOS and NMOS L = minimum
W -> Start with 5u for this plot. Then depending on the resistance your system required and the operating voltage increase the P or NMOS.
Good luck