[SOLVED] how to design an analog mux 2:1

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diaz080

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need to design an analog mux made using transistor to pass 1,-1v with respect to clk in cadence . I used logic gates to make the digital mux which is able to pass 1,0 .
But when it comes to -ve value of i/p it is not working..any idea?
 

can u please explain ?

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used simple transmission gate ..but output is not as desired
 

That is only half a transmission gate - try adding the other half (PMOS).
Click to expand...
In some cases, a single transistor might work, it's a matter of signal and supply voltage ranges. You need complementary transistors in transmission gates to achieve a rail-to-rail signal voltage range.

Referring to the circuit in post #3, the input signal must not swing beyond the MOSFET substrate voltage range.
Basic rules of CMOS design must be observed.
 

Sorry, I didn't notice the minus signs in the simulation results. Sometime QVGA screens just aren't big enough!

I sometimes only use one transistor for a transmission gate when I can be certain of the input voltage range.

Keith
 

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