How to consider the gound bounce in analog circuit?

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staric

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How to simulate the gound bounce in analog circuits? And How to build its model for simulation? Thanks
 

staric said:
How to simulate the gound bounce in analog circuits? And How to build its model for simulation? Thanks

Hi, staric,
Maybe the following paper will help you.
www.imse.cnm.es/esd-msd/WORKSHOPS/ IMEC2001/PRESENTATIONS/4b_bram_nauta.pdf
sixth
 

you need package model, include the package in you
simulation file.
 

Depending on the current flow of the components in the layout and the frequencies you should also concider the internal power grid as a parasitic net which could introduce ground bounce.

In the 90s with >0.5um ground bounce was more an package. With <0.18um also the internal supply start to make issues.
 

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