How to call multiple modules in a if else loop..

[grg.levi@gmail.com]

I WANT TO CHECK FOR MULTIPLE CODITIONS USING IF ELSE LOOP .. for each conditions i have to call multiple modules.. how can i check my conditions and call the respective modules in verilog..

is there any goto and end syntax or similar syntaxes present in verilog


help me...

 

[hpb]

Hi,
You can use "generate" loop; using which you can check the condition (if, if else, if else if..) and call any number of modules..

 

[grg.levi@gmail.com]

Hi Thank you,

Can you please give me an small program with example how to use the 'generate' loop to call mutiple modules in an if, if else, else if loops..

 

[hpb]

Hi Thank you,

Can you please give me an small program with example how to use the 'generate' loop to call mutiple modules in an if, if else, else if loops..

generate
    if (a == 1) begin
      module1_inst module1 (
      .in1 (h),
      .in2 (i),
      .out1 (j)
      );
    end
    else if (a == 2) begin
      module2_inst module2 (
      .in1 (x),
      .in2 (y),
      .out1 (z)
      );
    end   
    else begin
      module3_inst module3 (
      .in1 (h),
      .in2 (i),
      .out1 (j)
      );
    end
endgenerate

illustrated the if-else if - else condition. In this way you can use only if, only if-else branches.

 

[grg.levi@gmail.com]

Hi, Thank You

i tried this but couldnt get the output. shows error in modelsim, can u kindly send me the example with 3 modules like addition, subtraction and multiplication. And call them using the if, else if and else conditions in the main module...

 

[hpb]

Hi,

Can You share the error messages?
1 thing you should consider while using the generate statement is that you should not give the conditions which change dynamically.

 

[grg.levi@gmail.com]

hi,

i have tried initially with simple modules like addition, subtraction and multiplication modules but i cannot get the output,
thats why i asked for a simple example with code,