How can I describe a ROM in VHDL?

[honeyleabe]

how to design rom and ram in vhdl

hallo guys

The ROM I wanna describe is 16 bit.
Is there any method else?

thanks for replies

 

[xtcx]

vhdl rom xilinx

/.../problem now is that when synthetizing in ise,
this takes almost 40 minutes/.../

you've created a large constant, not a ROM block,
that's why the compiler needs so much time to connect
inputs of logic cells to "1's" and "0's" accordingly
to your description

Hi friends!, Could you clarify me about the meaning of CONSTANT and ROM as described here?. Because By declaring large constant array,we can access to its values using array index.Similarly ROM declarations can also be accessed using this index. Whats the difference and advantage between them?..Could some one clarify my doubts?. thanks

 

[Kyo Kusanagi]

vhdl rom file

Hi all,
I'm new in VHDL. I've got to design simple VHDL code for ROM & RAM. Data from ROM1 and ROM2 is added and the result is stored in RAM. I've to design each module first and integrate all modules by using port map design techniques. This design also has control unit. Please someone help me..

 

[vhdlnewb]

Re: How can I discribe a ROM in VHDL?

I NEED HELP. I have no idea on how to code for ROM with VHDL. Our professor just gave us the instruction set (Harvard Architecture Processor) and it's up to us on how to code all the instructions logically. The ROM is 256x16. I've uploaded the .pdf with the instruction sets in it. Help me please.

 

[TrickyDicky]

Re: How can I discribe a ROM in VHDL?

does the rom just contain the program?

Have you written any other VHDL, or do you just expect us to give you the work? you can find the codeing templates for roms in the Xilinx or Altera handbooks.

 

[vhdlnewb]

Re: How can I discribe a ROM in VHDL?

All I have is this


type ROM is array(0 to 255) of std_logic_vector (7 downto 0);
constant a: ROM := (

);

I don't know what to put inside the parenthesis. I'm not very sure on how to arrange the instruction sets logically.

 

[TrickyDicky]

Re: How can I discribe a ROM in VHDL?

if you're building a processor (which you are according to your assignment) you dont really use a rom. You'll need a state machine or case statement able to action each instruction.

 

[vhdlnewb]

Re: How can I discribe a ROM in VHDL?

Here's an example I found on the internet. It's a 32*8 ROM module. What I need is a 256*16 ROM module.. With the help of the PDF I attached earlier. The instruction sets are in it to guide me/you with flow. So does anyone have ideas?


--------------------------------------------------------------
-- 32*8 ROM module (ESD Book Chapter 5)
-- by Weijun Zhang, 04/2001
--
-- ROM model has predefined content for read only purpose
--------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity ROM is
port( Clock : in std_logic;
Reset : in std_logic;
Enable : in std_logic;
Read : in std_logic;
Address : in std_logic_vector(4 downto 0);
Data_out: out std_logic_vector(7 downto 0)
);
end ROM;

--------------------------------------------------------------

architecture Behav of ROM is

type ROM_Array is array (0 to 31)
of std_logic_vector(7 downto 0);

constant Content: ROM_Array := (
0 => "00000001", -- Suppose ROM has
1 => "00000010", -- prestored value
2 => "00000011", -- like this table
3 => "00000100", --
4 => "00000101", --
5 => "00000110", --
6 => "00000111", --
7 => "00001000", --
8 => "00001001", --
9 => "00001010", --
10 => "00001011", --
11 => "00001100", --
12 => "00001101", --
13 => "00001110", --
14 => "00001111", --
OTHERS => "11111111" --
);

begin
process(Clock, Reset, Read, Address)
begin
if( Reset = '1' ) then
Data_out <= "ZZZZZZZZ";
elsif( Clock'event and Clock = '1' ) then
if Enable = '1' then
if( Read = '1' ) then
Data_out <= Content(conv_integer(Address));
else
Data_out <= "ZZZZZZZZ";
end if;
end if;
end if;
end process;
end Behav;

--------------------------------------------------------------

 

[vhdlnewb]

Here's the block diagram of our system. And i've been assigned to program for a 256X16 ROM. Please code it for me. I badly need help. The PDF i've attached earlier is also very important.

 

[mrflibble]

Here's the block diagram of our system. And i've been assigned to program for a 256X16 ROM. Please code it for me. I badly need help. The PDF i've attached earlier is also very important.

Cool! I like poorly specified contract work under time pressure due to Homework Assignment Due RSN. So how much does this job pay?

What? Nothing? Mmmh, maybe we will have to rethink this partnership, to something where you do the actual work. And when there is a specific thing you have a problem with, post about that.

Did you know I also have a technical problem... I don't have enough money in the bank. PLZ fix! kthxbye!

Anyways, you get the drift. People around here are perfectly willing to help, but please at least pretend to be doing most of the work yourself. And if you cannot figure out what the hell the assignment is, ask your prof and/or teamies.

Good luck with your assignment!