High efficiency and low noise 5V to 3.3V

Hi Everyone.

I am currently designing the power supply for my DC board.

The board requires 600mA @3.3V and are supplied from 5v usb port (500mA @5V).

Also the board consists many high resolution DAC that are sensitive to noise.

To get down from 5V to 3.3V, if i used a buck, The noise maybe to high.

if i use a LDO, it may not meet the power requirement.

I am thinking to use a buck to step down to 3.5V and drop to 3.3V with LDO.

Is there a exciting integrated part that can do both in a single chip (Buck+LDO combo)?

or Is there a better solution for this?

Thanks for the help,

Eddy

Hi,

High efficiency ... means switching regulator
(Expect only 4.5V @ 500mA from an USB)

Low noise... doesn't tell much. You should give values.

In many cases a high quality switching regulator is sufficient. A well calculated design, a good PCB layout and passive post filters should do the job.

Where do you expect the noise is problematic?
* Noisy GND plane? What source, frequency?
* Noisy power supplies? Use filters.
* Capcitve or inductive coupled noise? Improve wiring, use differential signalling, shielded coils...
* Synchronize the switching regulator to your digital system clock. No burst mode, no hickup mode.

Klaus

"High" isn't helpful. Quantify your expectations / requirements.

LDO power dissipation is (VIN-VOUT)*IOUT neglecting ground
current.

LDO delivered power is VOUT*IOUT

LDO efficiency is POUT/(POUT+PDISS). For a 5-3.3V your
nominal eff% is 3.3/5 or 66%. Not heinous, not fabulous.
Probably on a par with a switcher efficiency if the load
is small, because switchers have switching losses just
sitting there, and make harsh noise full time.

But to make the step up in current a LDO is not going
to work and a switcher (or switcher plus post-LDO, for
noise reduction) is the only option.

You probably want a simple IC type with full load current
rated about 1A, which ought to put you on peak eff%
more or less.

Look for the buck+LDO products, which I know I've seen
out there but do not remember whose or what P/N.

As pointed out 5->3.3 isn't terrible for a linear regulator. Do you actually have input power limitations?


LMZ10501 is a very small and cheap switcher which can go from 5 to an adjustable output including 3.5 so it could do what you suggested.


If power is a major concern consider an LC post filter following a switcher. May be possible to have significant conducted noise reduction without a loss of efficiency.

The real fly in the linear ointment is that he wants more
output than input current. That requires a transform.
But noise probably wants a post-regulator. I would say
something like a buck doing 4.5-5.5V VIN, to 3.5V VOUT
and a post-regulator for 3.5 -> 3.3V would then exact a
pretty small (0.2V/3.5V=6%) additional penalty.

4.5/3.5V*0.5A would indicate a worst case current step-
up capability of 0.64A, barely exceeding the 600mA called
out originally. This does not account for waste power at
all. The USB source tolerances are important and not yet
quantified.

I'd say that 80% net efficiency is obtainable, 85% with
good engineering, 90% would be heroic and unlikely. But
I also think efficiency per se is not the primary goal.

A well calculated SMPS with several L-C output filters (2 to 4) could make the job. Also usying high frequencies will lower the L and C values (if working in small PCB)...

SMPS + LDO would be ideal, as most noise would be "clipped" and dissipated by the regulator, giving a perfect smooth output. You can do that, as your output power is pretty lower than input.

500mA * 5V = 2,5W = Pin
600mA * 3,3V = 1,98W = Pout

Pdmax= 500mW

Vreg=500mV --> To say, you should put about 1.25*Vripple+Vmin

Iout=600mA --> Pd= 300mW.

Then, the less the ripple, the lower Vreg can be, which means HIGHER EFFICIENCY.

Efficiency = Po / (Po + Pd) = 86% theorically, maybe 80, but with lower Vreg, 90% can be easily reached.


Hope being useful, tell us how you managed to.

Bruno.-