help on logical circuit design

[michcfr]

Hello,

I need a logical circuit with three ports: C, S and M.
M is an output only. C and S are bidirectional ports that can be either input or output.

I want the following behavior:
1)when C change its state (to 0 or 1) then change the state of S to the same state.
2)when S change its state (to 0 or 1) then change the state of C to the same state
3)M is set to 0 only when C change its state to 0 ( like in the case 1) but not in the case 2) consequently to S state change to 0), else M is always set to 1

Can you please help me to design such a circuit with transistors? gates? flip flop?... and to find the corresponding IC.

Thank you
Michel

 

[FvM]

I suppose It's not possible to bridge bidirectional ports without a means to detect the signal data direction, either protocol based or using special hardware.

 

[michcfr]

yes, I need something basic and simple...if possible

 

[danadakk]

What is max data rate on C and S ?


Regards, Dana.

 

[michcfr]

very low. C and S are just chip select pin

 

[danadakk]

Do this all in code on a UP or does it have to be a HW solution ?

Regards, Dana.

--- Updated Jul 19, 2020 ---

Do you have a signal that establishes for each port C and S if it is input or output ?
In other words if port is being driven as input, but also as output, what prevails ? Or
is the port Open Drain so that its simultaneous, basically wired and.

Regards, Dana.

 

[michcfr]

thank you Dana,

HW solution only.
No, I don't have such a signal. But S and C can not be output at the same time

 

[danadakk]

So what do you expect if both ports simultaneous changing ?

Regards, Dana.

 

[michcfr]

to have at M set to 1

 

[danadakk]

Yes but if C and S change, you want them to affect each other.

Example C sets a bit to 0, simultaneously S is trying to set that bit, what happens
to that bit in C and S ?

Regards, Dana.

 

[michcfr]

C and S can take the last value of that bit.
The most important is to have M set to 0 only when C change its state to 0 (case 3) )

 

[danadakk]

Sorry for all the question, C and S are bidirectional single pins ?
So they output a value, but by driving them they force that value to
the driver value ?

Or they drive a pin, and that pin state can then be read ?


Regards, Dana.

 

[michcfr]

Thank you Dana, I really appreciate your help.
This is rather the first situation.

Thx

 

[danadakk]

So just to be clear, a pin can be driving a 1 onto its output
while simultaneously an external driver is also driving a 0
onto pin and the resulting logic level is indeterminate ?

Or is the pin an output whose value being driven can be read
back into other logic ?

Regards, Dana.

 

[michcfr]

it is rather the first situation
thx

 

[danadakk]

I think this meets requirments, not yet tested.

C and S each have two pins, one configed as input, the other output, and tied together externally.
Both C & S output pins configed as passive internal pullup so pin can be driven low from external source.

If external logic input is a mechanical switch, easy to add debounce onchip resource to handle
switch bounce.

Clock is set at 1 uS.

When EdgeDetectC detects a rising or falling edge on C it clocks that value into the D which feeds
Sout pin. S changing operates same way on C.

M, its D FF, is cleared if a neg edge detected on C. If a positive edge detected on C then it is set.

Single chip design, no code for this function only, Cypress PSOC 4 or 5LP familiy. Most chip resources
unused, see right hand window used/left.

IDE and Compiler free, board would be ~ $ 10.


Regards, Dana.

 

[michcfr]

thank you very much Dana!
I'll check for your solution.
Can it be realized with quad flip-flop like the 74HC175? I need something basic and compct in dimension

 

[danadakk]

To do this with discrte logic you need to build edge detectors like

Also one of the Ds has to have preset capability, or you change the logic
on the output.

Regards, Dana.

 

[michcfr]

thank you very much Dana.
sorry for the beginner question: of which type is the DFF with the ap pin?

 

[danadakk]

Everything you see in my post is inside one part, the PSOC chip.

Flip flop discrete is - https://assets.nexperia.com/documents/data-sheet/74HC_HCT74.pdf

You also need open drain buffers to make the bi-directional behavior of
C and S.

https://media.digikey.com/pdf/Data%20Sheets/NXP%20PDFs/74HC(T)03.pdf

I think you should find an online logic simulator first before you go out and buy
anything to confirm the design works.


Regards, Dana.