Tunalover
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As electronic products are becoming smaller, the circuit heat dissipations have not reduced accordingly. EEs are becoming more concerned with thermal management and MEs are becoming more concerned with heat dissipation.
Now I've been an ME for a while doing electronic packaging and my experience has shown that worst-case circuit heat dissipation estimates provided by the EE design engineer are ultra-conservative and lead to over-design and unnecessary expense for thermal management. I've seen first-article product testing show real worst-case heat dissipation can be as little as 1/3 that of the estimate provided at the start of the design! But by then it was always too late to spin the design again to remove the unneeded thermal management hardware!
Guys I'm looking for EE guest authors and/or bloggers with experience in the estimation of most-likely maximum circuit heat dissipations who would be willing to contribute in the Electronics Cooling Magazine (ECM) publication and website blogs. Analog, RF, digital, or mixed, doesn't matter. The theory and general approaches are what we want to know about. I don't think the software used is important. This subject may take more than one blog so us electronic packaging guys and ECM would be really grateful if he/she would be willing to do a series if necessary. In fact one or more feature articles are also a possibility. BTW I'm not on the ECM staff but I'm becoming a first-time contributor soon. If it's too global to think the subject can be addressed for all circuit types at once, then maybe a few guys will be needed: one for digital, one for analog, and one for RF. Hopefully multiple treatments like this can be combined to address mixed-technology circuits.
Granted, the ECM target audience is thermal guys (usually MEs) and they may not be able to follow it all, they can at least share it with their EE colleagues who would most likely benefit from it.
Thanks,
Bruce
Now I've been an ME for a while doing electronic packaging and my experience has shown that worst-case circuit heat dissipation estimates provided by the EE design engineer are ultra-conservative and lead to over-design and unnecessary expense for thermal management. I've seen first-article product testing show real worst-case heat dissipation can be as little as 1/3 that of the estimate provided at the start of the design! But by then it was always too late to spin the design again to remove the unneeded thermal management hardware!
Guys I'm looking for EE guest authors and/or bloggers with experience in the estimation of most-likely maximum circuit heat dissipations who would be willing to contribute in the Electronics Cooling Magazine (ECM) publication and website blogs. Analog, RF, digital, or mixed, doesn't matter. The theory and general approaches are what we want to know about. I don't think the software used is important. This subject may take more than one blog so us electronic packaging guys and ECM would be really grateful if he/she would be willing to do a series if necessary. In fact one or more feature articles are also a possibility. BTW I'm not on the ECM staff but I'm becoming a first-time contributor soon. If it's too global to think the subject can be addressed for all circuit types at once, then maybe a few guys will be needed: one for digital, one for analog, and one for RF. Hopefully multiple treatments like this can be combined to address mixed-technology circuits.
Granted, the ECM target audience is thermal guys (usually MEs) and they may not be able to follow it all, they can at least share it with their EE colleagues who would most likely benefit from it.
Thanks,
Bruce