Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Dummy Load with Mosfet

Status
Not open for further replies.
Thanks klausst i think This method is easy...
and what should be the frequency of pwm?
 

Hi,

Frequency of PWM:

it depends on counter frequency, desired analog resolution and desired (filter) speed.

if a resolution of 256 (8 bit) is enough and you have a counter clock of 2MHz. without prescaler you get a PWM frequency of 2M /256 = 7.8 kHz
With a second order filter you need a cutoff frequency of about F_PWM/20 = 400Hz.


with 10 bit resolution: f_pwm = 2M/1024 = 2kHz
cutoff: f_pwm/33 = 60Hz

Do you think it is fast enough?

Good
luck

Klaus
 

Keep in mind a PWM switched inductor is not a linear dummy load. CUrrent should be continuous but ramping up and down over the switch interval. THis may be ok for your purpose or cause additional issues.
 

i don't know it will cause problem But current should be continuous for my purpose ..... can we get 100% pure dc voltage by filtering the signal??
 
Last edited:

Hi,

Pwm output from ucontroller, filter, to pin5 of opamp.
with my filter calculation you may expext about one lsb of ripple.

Hope that helps.
Klaus
 

Hi Klausst,,
I have written a code..it is working well on proteus....

Code:
 //Target pic: pic16f877a


sbit LCD_RS at RC2_bit;
sbit LCD_EN at RC3_bit;
sbit LCD_D4 at RC4_bit;
sbit LCD_D5 at RC5_bit;
sbit LCD_D6 at RC6_bit;
sbit LCD_D7 at RC7_bit;


sbit LCD_RS_Direction at TRISC2_bit;
sbit LCD_EN_Direction at TRISC3_bit;
sbit LCD_D4_Direction at TRISC4_bit;
sbit LCD_D5_Direction at TRISC5_bit;
sbit LCD_D6_Direction at TRISC6_bit;
sbit LCD_D7_Direction at TRISC7_bit;

char *l,*m,n[7],o[7];
  unsigned int k,j,i;
  unsigned int e,g;
  unsigned int maxcurrent;

  unsigned int cur_read; //current reading variable
  unsigned int pot_read; //potentiometer voltage reading variable
  unsigned int vol_read; //voltage reading variable


void LCD_Display(unsigned int value)
{
j=value/10;
i= (int)value%10;
inttostr(j,o);
inttostr(i,n);
l=ltrim(o);
m=ltrim(n);
if ((j<=99)&&(j>9)){
Lcd_out(1,10,l);
Lcd_out(1,12,".");
Lcd_out(1,13,m);
}
else  if (j<=9)
{
      Lcd_out(1,10,l);
      Lcd_out(1,11,".");
Lcd_out(1,12,m);
//Lcd_out(1,13," ");
}
else
{
Lcd_out(1,10,l);
      Lcd_out(1,13,".");
Lcd_out(1,14,m);
//Lcd_out(1,15,"  ");
}

     }


 void main()
{

short current_duty_2  = 0; // initial value for current_duty_2
PWM2_Init(7800); //7.8kHz frequency
PWM2_Start();  // start PWM2
PWM2_Set_Duty(current_duty_2);

         //TRISA=0x07; //analog input at RA0,RA1,RA2
         TRISA=0x07; //analog input at RA0,RA1,RA2
         TRISC=0x00;
         lcd_init(); //initializing LCD
         lcd_cmd(_LCD_CURSOR_OFF);

         ADCON1=0x02; // reference voltage VDD
         ADCON0.ADCS0=0;
         ADCON0.ADCS1=1;  //Fosc/8
         ADCON0.ADON=1;   //turn on analog module
  while (1)
  {
        // Current Measurement
        
        
        ADCON0=0x45;  //select RA0 channel
        Delay_us(30);  //acquisition Delay
        cur_read=ADC_Read(0); //reading ADC_Value at channel 0
        k= cur_read*0.585339584761;
        Lcd_Display(k);


         //Potentiometer Voltage Measurement

         //Delay_us(30);
         ADCON0=0x4D;  //select RA1 channel
         Delay_us(30); //acquisition Delay
         pot_read=ADC_Read(1); //reading ADC_Value at channel 1
         e=pot_read*0.127077224;
         //Lcd_Display(e);
         
         //Voltage Measurement
         
         //Delay_us(30);
         ADCON0=0x55; //select RA2 channel
         Delay_us(30); //acquisition Delay
         vol_read=ADC_Read(2); //reading ADC_Value at channel 2
         g=vol_read*1.5698924731;
         //Lcd_Display(g);
         
         /// PWM Generation
         maxcurrent=2000/g;

         current_duty_2=pot_read/4.02;  //maximum value of dutycycle is 1023/4.02 = 254
         while((k*0.1)>maxcurrent)   // current greater than maxcurrent then decrease the duty cycle
         {
         current_duty_2--;// decresing duty cycle
         }

         PWM2_Set_Duty(current_duty_2);//setting pwm for that duty cyclr

    Delay_ms(10); //Delay infinte loop
  }
}

How to make a second order low pass filter...
I have made using the webiste **broken link removed**
but proteus is not simulating the circuit correctly...
for 400Hz frequency ,R1=22k,R2=750k,R3=1.5M,R4=1.6M,C1=10000pF,C2=1000pF...
I don't know it is correct values?
Please check it this is correct second order low pass filter.
 

Hi,

To simplify it you can use two RC in series.
R1 = 1k0
C1 = 220n
R2 = 10k
C2 = 22n

This should give a second order low pass filter with 400Hz.

Klaus
 

Hi Klausst,
i have made filter..and the noise amplitude is about 50mV...is this ok? i have tested it to drive the mosfets and they are operating well...is drain current noise is proportional to gate voltage noise? if it is,,then can pic16f877a measure this noisy voltage( voltage across shunt )???
 

Hi,

is this OK?

It´s about what expected (42mVpp, that should give about 16mV RMS with 7.8kHz). if you want to lower it, then use bigger capacitors. But then it needs more time to settle.

What PWM frequency do you use?


Is it OK for you?

Klaus
 

Hi,



What PWM frequency do you use?

Klaus

pwm frequency is 7.8kHz......
can you tell how you calculated the values of resistors and capacitors in filter??
i calculate its cutoff frequency which comes to be 726Hz not 400Hz?
 

Hi,

cutoff frequency is defined at -3db.

For a first order filter you have -3dB at 726 Hz. (this is what you calculated)

With two stages in series you get -3dB (@726 Hz) in the first stage and additionally -3dB at the second stage. giving a total of -6dB.

So if one needs the -3db point of two equal filter then you need the -1.5dB point of the single stage. This is at 400Hz.

(this is not the precise calculation, but here it is not important if 350Hz or 450Hz)


Hope that clarifies it.

Klaus
 

Hi Klausst,,
i have made the circuit on pcb...but there is a problem current value is keep on changing 2 to 3 Amperes up and down...i think this is due to that 50mV noise?How can i keep the voltage on ADC pin stable?
 

Hi,


i don´t think the 50mV can cause 2-3A

can you show me your actual schematic?

Do you have a scope to show us some pictures of current and voltage?


Klaus
 

your schematic attached

Hamid , you have at least 140 dB loop gain so any POT and Vref noise will be amplified by this amount.

LM324 has 100dB gain and current sense 0.01R resistor is amplified by 40 dB giving 40dB.

Reconsider your Control System design parameters if you want a stable system.

Start again with your design requirements clearly stated.
(e.g. constant power or constant resistance or constant current,
then range, of ALL inputs and ALL outputs
then stability and tolerance and environmental range.

Discussions are useless otherwise. Trust me.
 

Attachments

  • variable_voltage_dummy_load.PDF
    23.3 KB · Views: 84
Last edited:

Hi,

I agree fully,

A local feedback on the fet driving opamp should lower the current ripple to less than 20mA.
(With no other sources of noise.)

Klaus
 

The circuit is for the simple constant current...but i am using pwm to maintain the maximum power constant...The Maximum Dc voltage will be 5V (approx. at duty cycle 100% )..So now 12V will become 5V or less depending upon the duty cycle.... SunnySkyguy,,where i have gain of 140 db???
 
Last edited:

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top