Re: Does anyone have read the book "Tradeoffs and Optimization in Analog CMOS Design"
Several samples of the Circuit analysis sheet can be found in his book, pp. 524 (degeneration), 526 (noise analysis), 544 (gain, UGB, noise).
Anyway it's "an optional, user-defined sheet that maps MOS device performance from the MOSFETs sheet into predictions of complete circuit performance. This sheet requires user-defined circuit analysis for the circuit topology of interest and “calls” device performance from the MOSFETs sheet. The Circuit Analysis sheet provides an immediate display of circuit performance as the designer explores MOS device design choices of drain current, inversion coefficient, and channel length. This leads towards rapid, optimum design." (pp. 576 & 577).