Distorted signal on HO output of IR2110 driver

[Janecheck]

Hello,
I am getting distored signal on HO output of my IR2110 driver.
I connected my IR2110 driver to a pair of two n - channel IRFP250 MOSFETs (no load) same as shown in data sheet.

I did not add the capacitor between drain of high side MOSFET, and source of low side MOSFET.

Picture 1 The way I wired the circuit (but without capacitor on the right side of the MOSFETs)
I used:

• 3 x 100 nF ceramic capacitors
• 2 x 100 ohm resistor
• 1 x UF4007 diode

Picture 2 Setup
I supplied it with a 12V DC and used Arduino Uno as square wave signal source.

Arduino code

digitalWrite(3, HIGH);
digitalWrite(5, LOW);
delay(5);
digitalWrite(3, LOW);
digitalWrite(5, HIGH);
delay(5);

Then I measured LIN, LO and HIN, HO with oscilloscope. Here are the measurments:

LO (top) & LIN (bottom)

Picture 3 Signals from LO (top) and LIN (bottom)

It looks good.

HO (top) & HIN (bottom)

Picture 4 Signals from HO (top) & HIN (bottom)

As we can see the signal from HO is distored and I don't know why. What might be the issue?

Is it because I picked wrong capacitor between Vb and Vs? If yes then how to choose the right capacitor?

I am trying to make 3 - phase inverter. At first for testing purposes only I wanted to control the speed of BLDC motor but after wiring it up it had quite a big problem to spin (it stared spinning after I pushed it a bit) and also one of six MOSFETs got hor quite fast (he is okay he just heats pretty quickly and this was strange for me). Now after measuring with oscilloscope I believe that the distorted HO signal was the issue.

Please help me.

 

[KlausST]

Hi,

I guess IR2110 issues is one of the most often discussed topic here.

The issues are the same, the answers, too:
* Read datasheets and application notes and follow the recommendations

They tell you:
* use proper bypass capacitors
* use a PCB layout according the PCB layout recommendations
* use a solid GND plane
* use short, low inductive wiring
* bootstrap circuit needs the Vs to be switched to GND

--> a breadboard is not suitable for switching power applications

For debugging: a datasheet_schematic is about useless .. because the datasheet_schematic is most probably correct.
Those schematics sometimes are just test circuits, miss informations, like supply voltages, bypass capacitors, complete wiring..
It´s more likely that the problem is in your circuit.

In your scope pictures I don´t see timing nor voltage informations.

Klaus

 

[D.A.(Tony)Stewart]

The HO side is floating and needs another oscillator to pump charge into the diode cap for Vb. Since you don't create this PWM situation, you need another source of >10 kHz to pump the 0.1uF cap.

thus If the LO side is not pulsing high enough frequency, the HO side cannot work. Vboost (Vb) must be 10V above the supply to drive the internal gates on HO out.

 

[dick_freebird]

The high side circuitry has only the bootstrap cap for power.
Eventually it will bleed it dry. You need to keep it lit enough
to not fall into high side UVLO. That probably means at least
10X the FET Cgg in the best case (so after LH edge, you will
still have about 90% of what you filled the cap with, remaining).
More doesn't hurt. But your choice of a bootstrap diode sure
can, if it has a high reverse recovery time you can end up
"back-sloshing" a lot of the current that you put in during the
low interval.

Also, learn to solder and throw away that solderless breadboard.
Way-inappropriate to high currents and high dV/dt, dI/dt.

 

[D.A.(Tony)Stewart]

IR2110 - Infineon Technologies

The IR2110 is a 500 V high-side and low-side gate driver IC with shutdown (14 Lead PDIP package)

www.infineon.com

Read the App Notes

https://web.mit.edu/6.131/www/document/float_drive.pdf

 

[KlausST]

Hi,

another good document for general (not IR2110 focussed) PCB layout considerations:
https://www.ti.com/lit/an/slva959b/slva959b.pdf

Klaus

 

[FvM]

Unfortunately no voltage and time scale shown in the waveforms.

Obviously undervoltage threshold of high side driver is triggered due to too long pulse respectively too small bootstrap capacitor. For ms pulse width you rather want uF bootstrap capacitor range. Current limiting resistor may me required.

 

[Janecheck]

I am very happy to see so many answers under my post. Thank you all.

First of all I would like to show you what I found. After reading your advices I thought that my bootstrap capacitor is too small and it dischrages too fast. I decided to increase the capacitance from 100nF (original) up to 300nF by connecting more capacitors in parallel. After measuring it with the scope I conclude that was the issue.

Here are the measurments (so sorry for not providing voltage and time earlier)

Capacitor between VS and VB - 300 nF
HO (top signal 1V per division, 0,5 ms) & HIN (bottom signal 500 mV per division, 0,5 ms)

Picture 1 HO & HIN signals
Now the signal looks better but it is still not perfect.
I believe that increasing the capacitance will improve the wave form. Is that correct?
Also what i believe is that increasing the frequency will charge capacitor much faster and this will also improve wave form. Is that correct?

Capacitor between VS and VB - 300 nF
LO (top signal 1V per division, 0,5 ms) & LIN (bottom signal 500 mV per division, 0,5 ms)

Picture 1 LO & LIN signals
Here on the low side the square wave looks perfect but also the voltage is much smaller. Why voltage is smaller on this side? Does it matter as if MOSFET is switched on anyway?

 

[D.A.(Tony)Stewart]

IQBS Quiescent VBS supply current 230 uA max, 125 uA typ from App Notes I posted in #5
Cb=Ic dt/dV so if you allow dV=1V for dt=4ms
Cb= 0.92 uF max 0.5 uF typ.

 

[KlausST]

Hi,

0.5ms/div --> does not match to your code --> "delay(5)" vs 3.5 div
0.5V/div for IN --> then the IN levels are 1div which means 0.5V, which is no valud level
1V/div for OUT --> then we see 1.2V or 2.5V which both are no valid levels

Again: please don't post a schematic without values from a datasheet. We need to see exactly your circuit.
The given schematic shows no voltages ... and the botstrap circuit can't work at all. I'm sure your schematic has to be different!
A hand drawn schematic is O.K. ... but it should contain all informations for a circuit to operate.

Klaus

 

[Janecheck]

Hello,

I made schematic of my exact circuit, here it is. I hope it is readable for you


Picture 1 schematic

Arduino code:

digitalWrite(3, HIGH);
digitalWrite(5, LOW);
digitalWrite(6, HIGH);
digitalWrite(9, LOW);
digitalWrite(10, HIGH);
digitalWrite(11, LOW);
delay(5);

digitalWrite(3, LOW);
digitalWrite(5, HIGH);
digitalWrite(6, LOW);
digitalWrite(9, HIGH);
digitalWrite(10, LOW);
digitalWrite(11, HIGH);
delay(5);

Also I want to show once again images from oscilloscope

I was measuring both HIN&LIN and HO&LO of every driver. The results were the same every time.

Measuring parameters:
2 ms / division
1 V / division for HO&LO channels
200 mV / division for HIN&LIN channels

Picture 2 image from oscilloscope while measuring HIN (bottom) and HO (top)

Picture 3 image from oscilloscope while measuring HIN (bottom) and HO (top)

Read datasheets and application notes and follow the recommendations

Yes I am trying to read it but as I am still learning it is often very hard for me to understand the technical datasheets and applications. I apologize if I am asking questions that can be simply answered by reading the datasheets,

* use proper bypass capacitors

I believe this what I did by adding capacitance to my circuit now only thing that I need is to calculate the right value of bootstrap capacitor.

* use a PCB layout according the PCB layout recommendations

I am currently using PCB for my MOSFETs but it is very low quality as it is my first PCB ever designed. But still all the drivers are connected on breadboard because I wanted just to figure out how to control them.

* use a solid GND plane

You mean just to use proper PCB rather than breadboard?

* use short, low inductive wiring

After switching to PCB I will keep in mind to keep paths as short as possible

* bootstrap circuit needs the Vs to be switched to GND

I believe this is what is happening in my circuit becasue Vs is directly connected to a junction point of source high side MOSFET and drain of low side MOSFET so the low side keeps switching bootsrap capacitor to GND

--> a breadboard is not suitable for switching power applications

Of course, I switched on my BLDC motor for a very short time because of this. For now I don't want to run any motor. Right now I want to focus on creating sine wave without any load connected but at first I am checking if my circuit is working propperly.

The HO side is floating and needs another oscillator to pump charge into the diode cap for Vb.

I don't quite understand what do you mean by another oscillator

Since you don't create this PWM situation, you need another source of >10 kHz to pump the 0.1uF cap.

thus If the LO side is not pulsing high enough frequency, the HO side cannot work.

I am creating jus a square wave. But even with arduino PWM it is still only 490 Hz so way smaller. You mean that in order to keep this little capacitor charged I have to switch it at least with 10 kHz frequency?

Vboost (Vb) must be 10V above the supply to drive the internal gates on HO out.

Does it mean that if I apply 12V on the MOSFETs drain then I should apply 22V on Vb? Because currently I was applying 12V both for MOSFETs drain and Vb.

That probably means at least
10X the FET Cgg in the best case (so after LH edge, you will
still have about 90% of what you filled the cap with, remaining).

Could you eplain what Cgg is? I couldn't find it in a data sheet but I believe it has something to do with input capacitance of a MOSFET?

But your choice of a bootstrap diode sure
can, if it has a high reverse recovery time you can end up
"back-sloshing" a lot of the current that you put in during the
low interval.

So if UF4007 (diode I use) has reverse recovery time of a 75 ns then my dead time should be at least 75 ns so current doesn't flow back to Vdd?

Also, learn to solder and throw away that solderless breadboard.

I will but I wanted just to learn how to control this device before I solder it.

Read the App Notes

Thanks for the notes. I am trying to understand it but as I am still learning it is quite challenging for me.

another good document for general (not IR2110 focussed) PCB layout considerations:

Thank you for this document. Currently I do not expect my circuit to be efficient. At first I want to achieve sine wave (or at least sine looking singal)on the output (after writing right code for it). I am wondering if I can achieve my goal with my poor PCB designing skills.

 

[D.A.(Tony)Stewart]

The schematic is clear but the topology is not correct.

Uno uses 3.3V logic while the hi-side FET Vgs needs 12V to 12V + Vboot for Vg. from bootstrap (current pump rectifier) using the IR2110 as its driver which gets logic signals from Uno. The IR2110 has voltage gain but is called a half bridge switch with deadtime control for commutation.

You may want to decide what waveforms you expect, 2 levels digital or PWM sine filtered. Then how does Boot voltage work on high side Nch since gate must be much higher than Drain = 12V

Think about the control input and output impedance for each state.

--- Updated Nov 27, 2023 ---

Recall
Cb=Ic dt/dV so if you allow dV=1V for dt=4ms
Cb= 0.92 uF max 0.5 uF typ.

so if PWM is 490 Hz or ~2ms , then dt = 1ms,
10kHz was referring to a smaller bootstrap cap.

 

[KlausST]

Hi,

the scope pictures show input voltage levels of 1 div. This means 2.2iv x 0.2V/div = 0.44V But I expect about 3.3V or 5.0V. There´s something wrong.

the scope pictures show output voltage levels of 2 div. This means 2div x 1V/div = 2V But I expect about 10V. There´s something wrong.

The output voltage drops a lot with time. But as long as there is no resistor between G-S of the MOSFET I see no reason for this. Please check.
For checking the HIGH side: The LOW side MOSFET needs to be connected completely!

How do you measure the HGH side output. Mind: usually both scope channels share the same GND, thus you can´t refer one scope input to GND and the other to VS at the same time.

Klaus

--- Updated Nov 28, 2023 ---

Yes I am trying to read it but as I am still learning it is often very hard for me to understand the technical datasheets and applications. I apologize if I am asking questions that can be simply answered by reading the datasheets,

No one understands such complex informations at once. It always is a process that needs time. So don´t force yourself to understand .. but to try so. I appreciate when one reads documents and refers to them to ask detailed questions.

I believe this what I did by adding capacitance to my circuit now only thing that I need is to calculate the right value of bootstrap capacitor.

I guess I never used something different than 100n. Maybe for low frequency applications. I usually install 10k between G-S of the MOSFET, this is what drains ot the bootstarp capacitor.
But the capacitor needs to be charged quickly, with high current flow, thus I usually install a much bigger reservoir for this: like 1uF at VCC (C8).

I am currently using PCB for my MOSFETs but it is very low quality as it is my first PCB ever designed. But still all the drivers are connected on breadboard because I wanted just to figure out how to control them.

This does not work properly! You need low impedance for some signals. Impedance. Don´t mix it with resistance.

By using a breadboard you have high impedance, because the wires are lengthy and the signal_and_it´s_return are not in close proximity.
When talking about resistance, then you can compensate a 2x length by 2x cross section. This does not work with impedance.
Using thicker cables/ wider traces won´t reduce impedance significantly.

You mean just to use proper PCB rather than breadboard?

GND plane: One copper layer of the PCB is solid. Only used for GND. No lengthy cuts, no other traces .. is my recommendation for beginners. Don´t be afraid of doing it this way, it´s simple and effective.

After switching to PCB I will keep in mind to keep paths as short as possible

It´s like testing the robustness of a house by building the test house of beach sand .. before building the true house out of concrete. It makes no sense.

 

[D.A.(Tony)Stewart]

I was wrong. Uno uses 5V logic. your scope shows 4.5V AC coupled . No problem.
When using 10:1 probes, simply report the selection x10. Some may get the wrong idea. I realize you are using an old scope and have to make do. Modern DSO's look better.

I could be misunderstanding, but your question is simply why is the HO twice the LO? 24V vs 12V
This is due to the charge pump from the LO driving the diode high after the boot cap charges up.

This is not what you want.

 

[D.A.(Tony)Stewart]

Or is it OK now?

 

[KlausST]

Hi,

@D.A.(Tony)Stewart:
I think the right side (driver output) is not correct.
The bootstrap capacitor usually is vonnected to VS and not VO, your VO wiring is unclear.

Maybe we just need a bit of context why your wiring is that way.

Please review.

Klaus

 

[Janecheck]

Hello,

I needed to revise few things about bootstrap circuit.

The HO side is floating and needs another oscillator to pump charge into the diode cap for Vb. Since you don't create this PWM situation, you need another source of >10 kHz to pump the 0.1uF cap.

Do you mean I should use charge pump circuit instead of a bootstrap circuit? I've never heard of charge pump before but what I read is that it is used when we need to set 100% duty cycle on high side (for example H bridge configuration to control the spinning direction of DC motor).

But I think this is not my case as I believe I am putting a PWM signal (with a fixed duty cycle) on LIN and HIN. By that I am charging bootstrap capacitor while LOW side is on and thanks to that I can supply HIGH side output and control HIGH side MOSFET.

I think earlier my problem was what @FvM said

Obviously undervoltage threshold of high side driver is triggered due to too long pulse respectively too small bootstrap capacitor.

This makes sense for me. I added capacitance for bootstrap so it drains slower and by that I gained a nicer square wave.
Here are previous images of wave forms

Oscilloscope image of a HIGH SIDE with only 100nF bootstrap

Picture 1 oscilloscope image of circuit with 100 nF bootstrap capacitor
Later I increased capacitance up to 300 nF

Oscilloscope image of a HIGH SIDE with 300nF bootstrap

Picture 2 oscilloscope image of circuit with 300 nF bootstrap capacitor

the scope pictures show output voltage levels of 2 div. This means 2div x 1V/div = 2V But I expect about 10V.

Why 2 divisions only? I am counting those little lines ant it gets 11 lines = 11 div = around 11V. I tested it with voltage meter and it also shows 11 V so I guess everything is correct?
The signal started to look like a square finally but I still had 2 problems.

1) The square is not perfect and why is that

The output voltage drops a lot with time. But as long as there is no resistor between G-S of the MOSFET I see no reason for this. Please check.
For checking the HIGH side: The LOW side MOSFET needs to be connected completely!

What do you mean by connecting LOW side MOSFET completely? Both of my MOSFETS are connected.

and also

I usually install 10k between G-S of the MOSFET, this is what drains ot the bootstarp capacitor.

Why is that needed?

IQBS Quiescent VBS supply current 230 uA max, 125 uA typ from App Notes I posted in #5
Cb=Ic dt/dV so if you allow dV=1V for dt=4ms
Cb= 0.92 uF max 0.5 uF typ.

I don't really get the equation at the moment but I believe the answer I will find in app notes you sent me.
What I understand from that is that I need bootstrap cap in range 0.5 - 0.92 uF if I am using this program

digitalWrite(3, HIGH);
digitalWrite(5, LOW);
digitalWrite(6, HIGH);
digitalWrite(9, LOW);
digitalWrite(10, HIGH);
digitalWrite(11, LOW);
delay(5);

digitalWrite(3, LOW);
digitalWrite(5, HIGH);
digitalWrite(6, LOW);
digitalWrite(9, HIGH);
digitalWrite(10, LOW);
digitalWrite(11, HIGH);
delay(5);

2) Second problem was that I am not sure what voltages should I expect

Vboost (Vb) must be 10V above the supply to drive the internal gates on HO out.

I've recently measured voltage between Vb and COM and it is around 17V which is only 5V above supply and not 10 V so it's bad. But I am using 300nF cap instead cap from range 0.5uF to 0,92uF as you mentioned so maybe that is the issue?

How do you measure the HGH side output. Mind: usually both scope channels share the same GND, thus you can´t refer one scope input to GND and the other to VS at the same time.

I measured both LO and HO refered to the COM.

 

[D.A.(Tony)Stewart]

1. Scope divisions are the major 1 cm not the minor marks. Thus 2V/div on scope * 10:1 probe means display is 20V/div. For Vboot we expect 2x Vdd - 1 diode drop. = ~ 23 V peak. If your Vb is only 17 V it is much lower than expected 2x Vdd

2. Bootstrap is a charge pump but only if LO goes fast enough for the current drain in HO chip bias and the size of the bootstrap capacitor.

I read your scope as producing only 100 Hz signals which is not fast enough for charging 100nF due to IQBS current decay which I reported in #9
Normally LO is used for high f PWM, but you just have a square wave at 100 Hz. I estimated you need 0.9 uF.(max) 0.5 uF (typ)

 

[KlausST]

Hi,

please don´t post Megabytes huge pics in PNG format. JPG is more suitable for photos, by using simple tools every of your pictures could easily go down below 100kBytes without losing thread related informations.

I am counting those little lines ant it gets 11 lines

A div is one square of the solid lines. the total scope screen is 10 div wide and 8 div high.

Both of my MOSFETS are connected.

Not in post#1. Low side drain is not connected, but it needs to be connected for the bootstrap circuit to work properly. It´s confusing if you don´t post consistant informations. We need to see exactly your circuit.

Why is that needed?

They are not needed.
but when I see your scope pictures, then it´s obvious that the bootstrap capacitor gets drained out. Drained out be current. And the current into the gate of the switched_ON MOSEFT_gate is almost zero. Thus I exect there is a something like such a resistor installed in your circuit.
If there is no resistor between G and S, .. then what drains out your bootstrap capacitor.
The "draining out" can not explained with the shown circuit .. thus I expect the shown circuits don´t show exactly your circuit.

Klaus

--- Updated Dec 1, 2023 ---

Hi,

if Tony´s voltage is correct, then it means the voltage drops about 3V in 5ms.
if the capacitor is 330nF, then this means there is a current of 330nF * 3V / 5ms = 1mA.
This is much more than a gate current.

So where does this 1mA flow?

Klaus

 

[D.A.(Tony)Stewart]

please don´t post Megabytes huge pics in PNG format. JPG is more suitable

EDA created the PNG. I just used the EDA process from a screenshot copy paste. And it was less than 1MB

if the capacitor is 330nF, then this means there is a current of 330nF * 3V / 5ms = 1mA.
This is much more than a gate current.

So where does this 1mA flow?

Klaus

Ic= C dV/dt= 330nF * 3V / 5ms ~ 20 uA not 1mA.