Thanks for the quick translation :spoko:monnoliv said:Hi all,
Just this post to invite you for seeing the second revision of the DSO with english translation !!!
I invite you to make lot of suggestions. I tried to keep the two options on the way (PC linked and handheld).
Here is the link:
**broken link removed**
See you,
I have a suggestion for an improvement of the USB interface.monnoliv said:I invite you to make lot of suggestions.
INTRODUCTION
The FT2232C is the 3rd generation of FTDI’s popular USB UART / FIFO I.C. family. This device features two Multi-Purpose UART / FIFO controllers which can be configured individually in several different modes. As well as a UART interface, FIFO interface and Bit-Bang IO modes of the 2nd generation FT232BM and FT245BM devices, the FT2232C offers a variety of additional new modes of operation, including a Multi-Protocol Synchronous Serial Engine interface which is designed specifically for synchronous serial protocols such as JTAG and SPI bus.
It's ok now, thanks.The link called 'next page' points to the page you are already on instead of page 3.
It is only if you click at the English text, if you click at the french text it is ok. For some reason it is divided in two different links instead of just on long link with text in both French and English, just like the 'previous page' link is.
We can use a cheaper FPGA (the EP1K10) but then we only have 512 x 8 (bits) x 2 (channels) of FIFO memory instead of 1024 x 8 x 2 (the EP1K30, with Quartus II I've already made a check for the available memory to store the samples, I used the FIFO megafunction). I checked (roughtly) the pinout of the EP1K10, EP1K30 and EP1K50 devices (TQFP144 package) and they have the same pin assigment. Then one can choose later the final device.Would you consider a cheaper FPGA?
What do you think about the simple "proto"?
se06745 said:Hi!
6) The onlyu problam that I have is accept a 100v or more input voltage. If I use digital switches to divide 1:10 or 1:50 .... these switch accept +-5v imput. (only solution is use a mechanical swith resistor divisor)
Thanks for all!!!
You should only make a protoype if you already have an evalution kit with the FPGA mounted.monnoliv said:About a prototype, I've no Idea, will the prototype be more simpler than the scope logic board ? You have to solder a TQFP 144 package, then you have to make a PCB, no? Why not make a PCB with a few more components and have the skeleton of the scope ?
It should be easy to upgrade to the new 3rd generation FTDI chip, same housing and sorrounding components.monnoliv said:ME, the FT2232C is very interresting indeed. Ok, I'll check for implementation.
The only two Altera FPGAs I could find for sale to private persons in my country is EP1K30TC144-3 and EP1K50TC144-3 at www.farnell.com.monnoliv said:We can use a cheaper FPGA (the EP1K10) but then we only have 512 x 8 (bits) x 2 (channels) of FIFO memory instead of 1024 x 8 x 2 (the EP1K30, with qu@rtus II I've already made a check for the available memory to store the samples, I used the FIFO megafunction). I checked (roughtly) the pinout of the EP1K10, EP1K30 and EP1K50 devices (TQFP144 package) and they have the same pin assigment. Then one can choose later the final device.Would you consider a cheaper FPGA?
What do you think about the simple "proto"?
Regards,
Ok, I'll check to implement the calibration.1) The analog hardware of bitscope DSO is important in order to calibrate the equip. Is very good!!!
No pb, let's configure this device with all the function to see if it worksI think 512x8x2 its ok for a handheld DSO.
Does anyone know of a cheaper place to buy theese FPGAs within the European Union
Where do you buy the @ltera FPGA monnoliv and how much do you have to pay for the ACEX's? Or do you get it thru your company for free?
Sounds like a good idea.monnoliv said:Does anyone know of a cheaper place to buy theese FPGAs within the European Union
Where do you buy the @ltera FPGA monnoliv and how much do you have to pay for the ACEX's? Or do you get it thru your company for free?
EBV:
EP1K10TC144-3 Price: 11.47 MOQ: 60
EP1K10TC144-2 Price: 15.57 MOQ: 60
EP1K30TC144-3 Price: 16.39 MOQ: 60
EP1K30TC144-2 Price: 22.13 MOQ: 60
(MOQ: Minimum Order Quantity)
Arrow has also the pieces but it's more expensive (no MOQ) as I saw.
It's not sure but perhaps I'll be able to buy 60 pieces and sell one piece at a time for each guy who is interrested (+shipment). The same for other pieces that are difficult to find in small quantity.
See you,
Good idea, but any suggestion for the protection of FPGA inputs ?I think you should add 8-, 16- or 32- bit Logic-analyzer functionality to the DSO too.
The connections to the FPGA could be made via a DSUB connector or a Centronics connector.
It's in fact a 2x 60MS/sCheck out this new ADVANCED PERSONAL SCOPE 240MS/s:
http://www.velleman.be
monnoliv said:Good idea, but any suggestion for the protection of FPGA inputs ?I think you should add 8-, 16- or 32- bit Logic-analyzer functionality to the DSO too.
The connections to the FPGA could be made via a DSUB connector or a Centronics connector.
Input Protection: Responsible for protecting the input comparator from excess voltage and
current. This protection scheme usually consists of a current-limiting resistor and a dual mode
transorb diode. This input protection circuit will have limits to its protection abilities. The user
should be careful not to apply an input voltage level that exceeds these limits. Input protection
was not implemented in this prototype.
se06745 said:Hi!
The photomos relays, it's true I didn't remember!! Thank's. 8)
But what is the frequency response of photomos relays. The maximum frequency input signal???
Best Regards!
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