c_oflynn
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Hello,
I need to put a number of decoupling capacitors on a board, and for space reasons I am going to put them on the side opposite the IC package.
However there is one thing I am not sure of here. When I put the via to go from the IC pin to the capacitor lead (everything is SMD), it will be connected to the power plane (it's not a full power plane, more like large inner power track).
So the thing is that the IC power pin will be electrically connected first to the power line, THEN to the decoupling capacitor. It seems to me like this might be ineffective - is this the case? If so, should I try to have two vias - one that connects the IC power pin to the capacitor, then another one that connects that cap to the power line? The power line is on an inner layer.
The capacitors are still very close to the IC pin, its never more than a few mm (not counting via length).
I'd like to avoid doing two vias it I need to obviously, as it will be more complicated (I don't think my EDA software can easily be told that I don't want this via to connect to the power track, even though it will be going through it and is part of the same net).
Regards,
-Colin
I need to put a number of decoupling capacitors on a board, and for space reasons I am going to put them on the side opposite the IC package.
However there is one thing I am not sure of here. When I put the via to go from the IC pin to the capacitor lead (everything is SMD), it will be connected to the power plane (it's not a full power plane, more like large inner power track).
So the thing is that the IC power pin will be electrically connected first to the power line, THEN to the decoupling capacitor. It seems to me like this might be ineffective - is this the case? If so, should I try to have two vias - one that connects the IC power pin to the capacitor, then another one that connects that cap to the power line? The power line is on an inner layer.
The capacitors are still very close to the IC pin, its never more than a few mm (not counting via length).
I'd like to avoid doing two vias it I need to obviously, as it will be more complicated (I don't think my EDA software can easily be told that I don't want this via to connect to the power track, even though it will be going through it and is part of the same net).
Regards,
-Colin