decoupling capacitors in integrated circuit design

[Junus2012]

Dear friends,

I have been suggested in one of my former posts to use the decoupling capacitor for the power supply rails after I finish with the design specially if I have some empty space which I can use this cap to fill in.

Most of the people I seen are using the MOS as a capacitor , why not I can use a poly capacitor for example ?

What is the value should be around of this capacitor or it can be any value.

Do we really need the decoupling capacitor for analog circuit like the case I am designing fully differential amplifier ? in my opinion the decoupling capacitors are more needed for digital circuit where the square wave signal disturb the power lines. However decoupling capacitor is also useful to improve the PSRR. Such kind of capacitors are in the range above 100 nF. So I am thinking that tens of fF which I add it may be useless.

I am not sure therefore I would like to have your kind opinion

Best Regards

 

[ljp2706]

Moscaps are used a lot of times because they are “free” you don’t have to pay for extra masks. They also have higher capacitance density when compared to momcaps which also tend to be free. The tricky thing about moscaps in an analog circuit is that capacitance varies significantly depending on the voltage across the device. But this is okay for decoupling purposes.

You have IR drop and parasitic inductances from whatever your supply is to the ASIC, so having decoupling helps stabilize that during large transients. Even in analog circuitry, you will have supply noise because of switching regulators and other switching circuitry. Having on chip decoupling is nice because it reduces the parasitic inductances of PCB traces and bump/wires which in turn improves the effectiveness of the decoupling. Even a few tens of pF will help with decoupling. Especially at the block level. Certain blocks need it more than others. For example, decoupling on IO buffers will shunt high frequency noise to ground, this prevents it from going somewhere undesireable like a bandgap block. Decoupling at the bandgap will also shunt undesirable noise to ground too. You also need to make sure you don’t over do it too because at a certain point, it can start to impact your overall yield.

 

[nitishn5]

Unless your chip is very small, you would have some routing resistance from your supply pin/pad to your circuit block. And this can lead to cross talk when there are multiple blocks on the same supply and the output impedance of the supply is not insignificant. The capacitance you put can act as a local decoupling to the block nearest to it and provide some respite. But the amount of advantage it provides depends on the value of the capacitance which might not be significant.

The idea is to fill any empty space with the capacitance. The type of capacitor should be the one with the maximum density.
A MOSCAP would be the best suited due to its higher cap density.
If you go with a poly cap or a metal cap, there are two things to note,
1. The effective capacitance would be lower. Lesser bang for your buck.
2. The silicon below the capacitor is lying unused. So why waste that space.

I think one reason this is recommended is to cover any minimum density requirements. Since we need to fill up empty areas to meet the density rules, why not use that for decoupling capacitors.

 

[Junus2012]

Dear friends,

Thank you so much for your kind help,

I will follow your discussion to fill the gaps with MOSFET transistor capacitor,

I have couple of questions

1. Which type of transistor should be better used, NMOS or PMOS ?

2. If the gap is large enough, should I make one big transistor capacitor or split it to some parts ?

Thank you once again

 

[ljp2706]

You should look at the pdk and see which one has a higher capacitance and use that one if you want to maximize your decoupling capacitance. I like using NFETs because you don’t have to worry about reverse biasing that nwell to the substrate.

As far as sizes go, you’ll want to have a bunch of smaller capacitors as having one very large one usually results in DRC/stress rule violations once you exceed a certain dimension. Large devices have stress effects like dishing that you have to watch out for. These stress effects can also hurt your yield.